Computer Science
Integrated Circuits
100%
Scan Chain
97%
Reverse Engineering
64%
Graph Neural Network
60%
Hardware Security
55%
Supply Chain
48%
Test Data Volume
46%
Experimental Result
45%
Obfuscation
43%
side-channel
42%
Security Vulnerability
37%
Security Analysis
36%
Computer Aided Design
31%
Attackers
30%
Machine Learning
24%
Power Dissipation
23%
provably secure
20%
Switching Activity
20%
Data Compression
19%
Integrated Circuit Design
19%
Physical Layout
18%
Case Study
17%
Open Source
17%
Concurrent Error Detection
16%
Postprocessing
15%
Manufacturing Test
14%
Power Constraint
14%
Combinational Logic
14%
Deep Neural Network
14%
Memristor
13%
Fault Injection
13%
Physical Design
13%
Independent Set
13%
Shift Operation
13%
Protection Technique
13%
Power Analysis
13%
Level Compression
12%
Function Point
12%
binary decision diagram
12%
Benchmarking
12%
System-on-Chip
11%
Learning System
11%
Machine Learning
11%
Design Framework
11%
Research Community
11%
Data Transformation
11%
Parallelism
11%
Logic Gate
10%
Critical Application
10%
High Level Synthesis
10%
Engineering
Test Data
89%
Data Volume
49%
Test Time
48%
Experimental Result
46%
Test Stimulus
26%
Compactor
20%
Integrated Circuit
20%
Flip Flop Circuits
19%
Parallelism
19%
Observability
19%
Cost Reduction
18%
Switching Activity
17%
Testability
16%
Side Channel Attack
16%
Energy Dissipation
16%
Energy Engineering
16%
Shift Operation
15%
Defects
13%
Fault Model
13%
Logic Gate
13%
Compression Level
12%
Applicability
11%
Switching Circuit
11%
Process Variation
9%
Search Space
9%
System-on-Chip
9%
Performance Degradation
9%
Side Output
8%
Intellectual Property Core
8%
Hazards
8%
Concurrent Error Detection
8%
Reducing Power
8%
Normal Modes
8%
Storage Requirement
8%
Digital Circuits
8%
Average Power
8%
Carbon Nanotube
8%
Nanoelectromechanical System
8%
Peak Power
8%
Fits and Tolerances
8%
Shift Register
8%
Encoding Circuit
8%
Power Constraint
7%
Multiplexer
7%
Performance Penalty
7%
VLSI Circuits
7%
Secret Key
6%
Design Flow
6%
Controllability
6%
Functional Area
5%
Keyphrases
Logic Locking
33%
Scan Chain
29%
Integrated Circuits
23%
Graph Neural Network
17%
Test Power
16%
Decompressor
14%
Test Vector
14%
Test Power Reduction
13%
Scan-based Attack
12%
Concurrent Error Detection
12%
Reconfigurable
12%
Integrated Circuit Layout
12%
Chain Modification
12%
Scan Cell
12%
Compression Level
12%
Low Power
10%
Security Analysis
10%
Security Closure
10%
Secret Key
10%
Test Quality
10%
Side-channel Attacks
9%
Design for Testability
9%
Logic Circuit
9%
Test Data Compression
9%
Computer-aided Design
9%
Test Pattern
8%
Intellectual Property
8%
Test Data Volume
8%
Partial Scan
8%
Flip-flop
8%
Don't Care Bits
8%
Capture Power
8%
Oracle-less Attack
8%
Fault Diagnosis
8%
Deterministic Test
8%
Launch-off-capture
8%
Launch Power
8%
Test Access Mechanism
8%
Peak Power Reduction
8%
Security Design
8%
Multi-Vdd
8%
Adaptive Reduction
8%
Circuit Reliability
8%
Power Dissipation
8%
Test Stimuli
8%
Security Threats
8%
Vulnerability
8%
Obfuscation
7%
Design Flow
7%
Satisfiability Attack
7%