Research output

Research output per year 2001 2009 2012 2013 2015 2016 2017 2019 2020 2021 2022 2023 2024

• 131 Conference contribution
• 111 Article
• 14 Chapter
• 12 Paper
• 19 More
  • 9 Conference article
  • 8 Editorial
  • 2 Book

Research output per year

Research output per year

Search results

• 2020

  A Brief History of Logic Locking

  Yasin, M., Rajendran, J. & Sinanoglu, O., 2020, Analog Circuits and Signal Processing. Springer, p. 17-31 15 p. (Analog Circuits and Signal Processing).

  Research output: Chapter in Book/Report/Conference proceeding › Chapter

  • Research Community 100%
  • side-channel 100%
  • History of Logic 100%
  • Defense Algorithm 6%

• Approximate Attacks

  Yasin, M., Rajendran, J. & Sinanoglu, O., 2020, Analog Circuits and Signal Processing. Springer, p. 69-76 8 p. (Analog Circuits and Signal Processing).

  Research output: Chapter in Book/Report/Conference proceeding › Chapter

  • Regular Interval 100%
  • Corruptibility 80%
  • Compound Technique 40%

• Discussion

  Yasin, M., Rajendran, J. & Sinanoglu, O., 2020, Analog Circuits and Signal Processing. Springer, p. 131-137 7 p. (Analog Circuits and Signal Processing).

  Research output: Chapter in Book/Report/Conference proceeding › Chapter

  • Logic Locking 100%
  • Attack Defense 66%
  • Chap 33%

• Post-SAT 1: Point Function-Based Logic Locking

  Yasin, M., Rajendran, J. & Sinanoglu, O., 2020, Analog Circuits and Signal Processing. Springer, p. 57-67 11 p. (Analog Circuits and Signal Processing).

  Research output: Chapter in Book/Report/Conference proceeding › Chapter

  • Limitations 100%
  • SAT1 100%
  • Function Point 100%
  • Error Rate 50%
  • Implementation Cost 50%

• Post-SAT 2: Insertion of SAT-Unresolvable Structures

  Yasin, M., Rajendran, J. & Sinanoglu, O., 2020, Analog Circuits and Signal Processing. Springer, p. 93-102 10 p. (Analog Circuits and Signal Processing).

  Research output: Chapter in Book/Report/Conference proceeding › Chapter

  • SAT2 100%
  • Security Vulnerability 100%
  • Carbon Nanofiber 100%
  • CycSAT 10%
  • CycSAT Attack 10%

• Post-SAT 3: Stripped-Functionality Logic Locking

  Yasin, M., Rajendran, J. & Sinanoglu, O., 2020, Analog Circuits and Signal Processing. Springer, p. 103-118 16 p. (Analog Circuits and Signal Processing).

  Research output: Chapter in Book/Report/Conference proceeding › Chapter

  • provable security 100%
  • Original Circuit 50%
  • Design Functionality 7%

• Pre-SAT Logic Locking

  Yasin, M., Rajendran, J. & Sinanoglu, O., 2020, Analog Circuits and Signal Processing. Springer, p. 33-46 14 p. (Analog Circuits and Signal Processing).

  Research output: Chapter in Book/Report/Conference proceeding › Chapter

  • Logic Locking 100%
  • Black Box 33%
  • Strong Interference 16%
  • Divide-and-conquer 16%
  • First-ever 16%

• Side-Channel Attacks

  Yasin, M., Rajendran, J. & Sinanoglu, O., 2020, Analog Circuits and Signal Processing. Springer, p. 119-130 12 p. (Analog Circuits and Signal Processing).

  Research output: Chapter in Book/Report/Conference proceeding › Chapter

  • side-channel 100%
  • Power Analysis 28%
  • Data Mining 28%
  • Logic Synthesis 28%
  • Hill Climbing 28%

• Structural Attacks

  Yasin, M., Rajendran, J. & Sinanoglu, O., 2020, Analog Circuits and Signal Processing. Springer, p. 77-92 16 p. (Analog Circuits and Signal Processing).

  Research output: Chapter in Book/Report/Conference proceeding › Chapter

  • Function Point 100%
  • Structural Defence 100%
  • Security Vulnerability 66%
  • Anti-SAT 57%
  • Structural Property 33%

• The Need for Logic Locking

  Yasin, M., Rajendran, J. & Sinanoglu, O., 2020, Analog Circuits and Signal Processing. Springer, p. 1-16 16 p. (Analog Circuits and Signal Processing).

  Research output: Chapter in Book/Report/Conference proceeding › Chapter

  • Intel Processor 100%
  • Satellite Equipment 40%
  • Root of Trust 40%
  • Intel CPUs 40%

• The SAT Attack

  Yasin, M., Rajendran, J. & Sinanoglu, O., 2020, Analog Circuits and Signal Processing. Springer, p. 47-56 10 p. (Analog Circuits and Signal Processing).

  Research output: Chapter in Book/Report/Conference proceeding › Chapter

  • Quantify Security 100%
  • Formal Security Analysis 10%
• 2018

  Hardware security and trust: Logic locking as a design-for-trust solution

  Yasin, M., Mazumdar, B., Rajendran, J. & Sinanoglu, O., Jan 1 2018, The IoT Physical Layer: Design and Implementation. Springer International Publishing, p. 353-373 21 p.

  Research output: Chapter in Book/Report/Conference proceeding › Chapter

  • Integrated Circuits 100%
  • Hardware Security 100%
  • Trust Logic 100%
  • Research Effort 50%
  • Supply Chain 50%
• 2017

  Physical unclonable functions and intellectual property protection techniques

  Karri, R., Sinanoglu, O. & Rajendran, J., Jan 1 2017, Fundamentals of IP and SoC Security: Design, Verification, and Debug. Springer International Publishing, p. 199-222 24 p.

  Research output: Chapter in Book/Report/Conference proceeding › Chapter

  • Protection Technique 100%
  • Hardware Security 33%
  • Cryptographic Protocol 33%
  • Security Technique 33%
  • Integrated Circuit Design 33%

• Scan design: Basics, advancements, and vulnerabilities

  Saeed, S. M., Ali, S. S. & Sinanoglu, O., Jan 1 2017, Hardware Security and Trust: Design and Deployment of Integrated Circuits in a Threatened Environment. Springer International Publishing, p. 107-126 20 p.

  Research output: Chapter in Book/Report/Conference proceeding › Chapter

  • Manufacturing Test 100%
  • Attackers 50%
  • Scan Chain 50%
  • Design Complexity 50%
  • Security Vulnerability 50%