No photo of Siddharth Garg

Siddharth Garg

Assistant Professor

    20042020

    Research output per year

    If you made any changes in Pure these will be visible here soon.

    Research Output

    2020

    Enabling timing error resilience for low-power systolic-array based deep learning accelerators

    Zhang, J., Ghodsi, Z., Garg, S. & Rangineni, K., Apr 2020, In : IEEE Design and Test. 37, 2, p. 93-102 10 p., 8868188.

    Research output: Contribution to journalArticle

    SafeTPU: A Verifiably Secure Hardware Accelerator for Deep Neural Networks

    Mera Collantes, M. I., Ghodsi, Z. & Garg, S., Apr 2020, Proceedings - 2020 IEEE 38th VLSI Test Symposium, VTS 2020. IEEE Computer Society, 9107564. (Proceedings of the IEEE VLSI Test Symposium; vol. 2020-April).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    2019

    A Concentration of Measure Approach to Database De-anonymization

    Shirani, F., Garg, S. & Erkip, E., Jul 2019, 2019 IEEE International Symposium on Information Theory, ISIT 2019 - Proceedings. Institute of Electrical and Electronics Engineers Inc., p. 2748-2752 5 p. 8849392. (IEEE International Symposium on Information Theory - Proceedings; vol. 2019-July).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    Adaptive Adversarial Videos on Roadside Billboards: Dynamically Modifying Trajectories of Autonomous Vehicles

    Patel, N., Krishnamurthy, P., Garg, S. & Khorrami, F., Nov 2019, 2019 IEEE/RSJ International Conference on Intelligent Robots and Systems, IROS 2019. Institute of Electrical and Electronics Engineers Inc., p. 5916-5921 6 p. 8968267. (IEEE International Conference on Intelligent Robots and Systems).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    BadNets: Evaluating Backdooring Attacks on Deep Neural Networks

    Gu, T., Liu, K., Dolan-Gavitt, B. & Garg, S., Jan 1 2019, In : IEEE Access. 7, p. 47230-47243 14 p., 8685687.

    Research output: Contribution to journalArticle

    Open Access

    Compact: On-chip compression of activations for low power systolic array based CNN acceleration

    Zhang, J., Raj, P., Zarar, S., Ambardekar, A. & Garg, S., Oct 2019, In : ACM Transactions on Embedded Computing Systems. 18, 5s, a47.

    Research output: Contribution to journalArticle

    Don’t Trust, Verify: A Verifiable Hardware Accelerator for Matrix Multiplication

    Collantes, M. I. M. & Garg, S., Jan 1 2019, (Accepted/In press) In : IEEE Embedded Systems Letters.

    Research output: Contribution to journalArticle

    Fault-Tolerant Systolic Array Based Accelerators for Deep Neural Network Execution

    Zhang, J. J., Basu, K. & Garg, S., Oct 2019, In : IEEE Design and Test. 36, 5, p. 44-53 10 p., 8709714.

    Research output: Contribution to journalArticle

    INVITED: Building robust machine learning systems: Current progress, research challenges, and opportunities

    Zhang, J. J., Liu, K., Khalid, F., Hanif, M. A., Rehman, S., Theocharides, T., Artussi, A., Shafique, M. & Garg, S., Jun 2 2019, Proceedings of the 56th Annual Design Automation Conference 2019, DAC 2019. Institute of Electrical and Electronics Engineers Inc., a175. (Proceedings - Design Automation Conference).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    Matching Graphs with Community Structure: A Concentration of Measure Approach

    Shirani, F., Garg, S. & Erkip, E., Feb 5 2019, 2018 56th Annual Allerton Conference on Communication, Control, and Computing, Allerton 2018. Institute of Electrical and Electronics Engineers Inc., p. 1028-1035 8 p. 8636015. (2018 56th Annual Allerton Conference on Communication, Control, and Computing, Allerton 2018).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    Split manufacturing-based register transfer-level obfuscation

    Cui, X., Zhang, J. J., Wu, K., Garg, S. & Karri, R., Jan 2019, In : ACM Journal on Emerging Technologies in Computing Systems. 15, 1, 11.

    Research output: Contribution to journalArticle

    TaintHLS: High-Level Synthesis for Dynamic Information Flow Tracking

    Pilato, C., Wu, K., Garg, S., Karri, R. & Regazzoni, F., May 2019, In : IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 38, 5, p. 798-808 11 p., 8356053.

    Research output: Contribution to journalArticle

    TrojanZero: Switching Activity-Aware Design of Undetectable Hardware Trojans with Zero Power and Area Footprint

    Abbassi, I. H., Khalid, F., Rehman, S., Kamboh, A. M., Jantsch, A., Garg, S. & Shafique, M., May 14 2019, Proceedings of the 2019 Design, Automation and Test in Europe Conference and Exhibition, DATE 2019. Institute of Electrical and Electronics Engineers Inc., p. 914-919 6 p. 8714829. (Proceedings of the 2019 Design, Automation and Test in Europe Conference and Exhibition, DATE 2019).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    2018

    Analyzing and mitigating the impact of permanent faults on a systolic array based neural network accelerator

    Zhang, J., Gu, T., Basu, K. & Garg, S., May 29 2018, Proceedings - 2018 IEEE 36th VLSI Test Symposium, VTS 2018. IEEE Computer Society, p. 1-6 6 p. (Proceedings of the IEEE VLSI Test Symposium; vol. 2018-April).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    An information theoretic framework for active de-anonymization in social networks based on group memberships

    Shirani, F., Garg, S. & Erkip, E., Jan 17 2018, 55th Annual Allerton Conference on Communication, Control, and Computing, Allerton 2017. Institute of Electrical and Electronics Engineers Inc., p. 470-477 8 p. (55th Annual Allerton Conference on Communication, Control, and Computing, Allerton 2017; vol. 2018-January).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    Dynamic Power Management for Dark Silicon Multicore Processors

    Garg, S., Jan 1 2018, Advances in Computers. Hurson, A. R. & Sarbazi-Azad, H. (eds.). Academic Press Inc., p. 171-216 46 p. (Advances in Computers; vol. 110).

    Research output: Chapter in Book/Report/Conference proceedingChapter

    FATE: Fast and accurate timing error prediction framework for low power DNN accelerator design

    Zhang, J. J. & Garg, S., Nov 5 2018, 2018 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2018 - Digest of Technical Papers. Institute of Electrical and Electronics Engineers Inc., a24. (IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    Fine-pruning: Defending against backdooring attacks on deep neural networks

    Liu, K., Dolan-Gavitt, B. & Garg, S., Jan 1 2018, Research in Attacks, Intrusions, and Defenses - 21st International Symposium, RAID 2018, Proceedings. Bailey, M., Ioannidis, S., Stamatogiannakis, M. & Holz, T. (eds.). Springer Verlag, p. 273-294 22 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 11050 LNCS).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    Lack of robustness of Lidar-based deep learning systems to small adversarial perturbations

    Patel, N., Liu, K., Krishnamurthy, P., Garg, S. & Khorrami, F., Jan 1 2018, 50th International Symposium on Robotics, ISR 2018. VDE Verlag GmbH, p. 359-365 7 p. (50th International Symposium on Robotics, ISR 2018).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    Optimal Active social Network De-anonymization Using Information Thresholds

    Shirani, F., Garg, S. & Erkip, E., Aug 15 2018, 2018 IEEE International Symposium on Information Theory, ISIT 2018. Institute of Electrical and Electronics Engineers Inc., p. 1445-1449 5 p. 8437739. (IEEE International Symposium on Information Theory - Proceedings; vol. 2018-June).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    Securing Hardware Accelerators: A New Challenge for High-Level Synthesis

    Pilato, C., Garg, S., Wu, K., Karri, R. & Regazzoni, F., Sep 2018, In : IEEE Embedded Systems Letters. 10, 3, p. 77-80 4 p., 8114281.

    Research output: Contribution to journalArticle

    Seeded graph matching: Efficient algorithms and theoretical guarantees

    Shirani, F., Garg, S. & Erkip, E., Apr 10 2018, Conference Record of 51st Asilomar Conference on Signals, Systems and Computers, ACSSC 2017. Matthews, M. B. (ed.). Institute of Electrical and Electronics Engineers Inc., p. 253-257 5 p. 8335178. (Conference Record of 51st Asilomar Conference on Signals, Systems and Computers, ACSSC 2017; vol. 2017-October).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    Special session: Recent developments in hardware security

    Commarota, R., Karimi, N., Garg, S. & Rajendran, J., May 29 2018, Proceedings - 2018 IEEE 36th VLSI Test Symposium, VTS 2018. IEEE Computer Society, 1 p. (Proceedings of the IEEE VLSI Test Symposium; vol. 2018-April).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    TAO: Techniques for algorithm-level obfuscation during high-level synthesis

    Pilato, C., Regazzoni, F., Karri, R. & Garg, S., Jun 24 2018, Proceedings of the 55th Annual Design Automation Conference, DAC 2018. Institute of Electrical and Electronics Engineers Inc., a155. (Proceedings - Design Automation Conference; vol. Part F137710).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    ThUnderVolt: Enabling aggressive voltage underscaling and timing error resilience for energy efficient deep learning accelerators

    Zhang, J., Rangineni, K., Ghodsi, Z. & Garg, S., Jun 24 2018, Proceedings of the 55th Annual Design Automation Conference, DAC 2018. Institute of Electrical and Electronics Engineers Inc., a19. (Proceedings - Design Automation Conference; vol. Part F137710).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    Typicality Matching for Pairs of Correlated Graphs

    Shirani, F., Garg, S. & Erkip, E., Aug 15 2018, 2018 IEEE International Symposium on Information Theory, ISIT 2018. Institute of Electrical and Electronics Engineers Inc., p. 221-225 5 p. 8437567. (IEEE International Symposium on Information Theory - Proceedings; vol. 2018-June).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    2017

    BandiTS: Dynamic timing speculation using multi-armed bandit based optimization

    Zhang, J. J. & Garg, S., May 11 2017, Proceedings of the 2017 Design, Automation and Test in Europe, DATE 2017. Institute of Electrical and Electronics Engineers Inc., p. 922-925 4 p. 7927121. (Proceedings of the 2017 Design, Automation and Test in Europe, DATE 2017).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    Computing in the dark silicon era: Current trends and research challenges

    Shafique, M. & Garg, S., Apr 2017, In : IEEE Design and Test. 34, 2, p. 8-23 16 p., 7762141.

    Research output: Contribution to journalArticle

    Guest Editors' Introduction: Computing in the Dark Silicon Era

    Shafique, M., Garg, S. & Chandra, V., Apr 2017, In : IEEE Design and Test. 34, 2, p. 5-7 3 p., 7862952.

    Research output: Contribution to journalEditorial

    Heterogeneous dark silicon chip multi-processors: Design and run-time management

    Garg, S., Turakhia, Y. & Marculescu, D., Jan 1 2017, The Dark Side of Silicon: Energy Efficient Computing in the Dark Silicon Era. Springer International Publishing, p. 95-122 28 p.

    Research output: Chapter in Book/Report/Conference proceedingChapter

    Inspiring trust in outsourced integrated circuit fabrication

    Garg, S., May 11 2017, Proceedings of the 2017 Design, Automation and Test in Europe, DATE 2017. Institute of Electrical and Electronics Engineers Inc., 1 p. 7927158. (Proceedings of the 2017 Design, Automation and Test in Europe, DATE 2017).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    IoT-enabled distributed cyber-attacks on transmission and distribution grids

    Dvorkin, Y. & Garg, S., Nov 13 2017, 2017 North American Power Symposium, NAPS 2017. Institute of Electrical and Electronics Engineers Inc., 8107363. (2017 North American Power Symposium, NAPS 2017).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    Logic encryption

    Rajendran, J. J. V. & Garg, S., Jan 1 2017, Hardware Protection through Obfuscation. Springer International Publishing, p. 71-88 18 p.

    Research output: Chapter in Book/Report/Conference proceedingChapter

    Optimal checkpointing for secure intermittently-powered IoT devices

    Ghodsi, Z., Garg, S. & Karri, R., Dec 13 2017, 2017 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2017. Institute of Electrical and Electronics Engineers Inc., p. 376-383 8 p. (IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD; vol. 2017-November).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    Optimal de-anonymization in random graphs with community structure

    Onaran, E., Garg, S. & Erkip, E., Feb 7 2017, 37th IEEE Sarnoff Symposium, Sarnoff 2016. Institute of Electrical and Electronics Engineers Inc., 7846734. (37th IEEE Sarnoff Symposium, Sarnoff 2016).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    Optimal de-anonymization in random graphs with community structure

    Onaran, E., Garg, S. & Erkip, E., Mar 1 2017, Conference Record of the 50th Asilomar Conference on Signals, Systems and Computers, ACSSC 2016. Matthews, M. B. (ed.). IEEE Computer Society, p. 709-713 5 p. 7869137. (Conference Record - Asilomar Conference on Signals, Systems and Computers).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    Rethinking split manufacturing: An information-theoretic approach with secure layout techniques

    Sengupta, A., Patnaik, S., Knechtel, J., Ashraf, M., Garg, S. & Sinanoglu, O., Dec 13 2017, 2017 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2017. Institute of Electrical and Electronics Engineers Inc., p. 329-336 8 p. (IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD; vol. 2017-November).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    Reverse engineering camouflaged sequential circuits without scan access

    Massad, M. E., Garg, S. & Tripunitara, M., Dec 13 2017, 2017 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2017. Institute of Electrical and Electronics Engineers Inc., p. 33-40 8 p. (IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD; vol. 2017-November).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    SafetyNets: Verifiable execution of deep neural networks on an untrusted cloud

    Ghodsi, Z., Gu, T. & Garg, S., Jan 1 2017, In : Advances in Neural Information Processing Systems. 2017-December, p. 4673-4682 10 p.

    Research output: Contribution to journalConference article

    Split manufacturing

    Garg, S. & Rajendran, J. J. V., Jan 1 2017, Hardware Protection through Obfuscation. Springer International Publishing, p. 243-262 20 p.

    Research output: Chapter in Book/Report/Conference proceedingChapter

    The need for declarative properties in digital IC security

    El Massad, M., Imeson, F., Garg, S. & Tripunitara, M., May 10 2017, GLSVLSI 2017 - Proceedings of the Great Lakes Symposium on VLSI 2017. Association for Computing Machinery, p. 333-338 6 p. (Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI; vol. Part F127756).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    Thread Progress Equalization: Dynamically Adaptive Power-Constrained Performance Optimization of Multi-Threaded Applications

    Turakhia, Y., Liu, G., Garg, S. & Marculescu, D., Apr 1 2017, In : IEEE Transactions on Computers. 66, 4, p. 731-744 14 p., 7565594.

    Research output: Contribution to journalArticle

    2016

    Analysis of energy-and SoC-neutral contracts for frequency regulation with energy storage

    Fooladivanda, D., Rosenberg, C. & Garg, S., Mar 17 2016, 2015 IEEE International Conference on Smart Grid Communications, SmartGridComm 2015. Institute of Electrical and Electronics Engineers Inc., p. 743-749 7 p. 7436390. (2015 IEEE International Conference on Smart Grid Communications, SmartGridComm 2015).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    Can flexible, domain specific programmable logic prevent IP theft?

    Cui, X., Wu, K., Garg, S. & Karri, R., Oct 25 2016, 2016 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2016. Institute of Electrical and Electronics Engineers Inc., p. 153-157 5 p. 7684088. (2016 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2016).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    Energy-efficient computing from systems-on-chip to micro-server and data centers

    Bogdan, P., Garg, S. & Ogras, U. Y., Jan 26 2016, 2015 6th International Green and Sustainable Computing Conference. Institute of Electrical and Electronics Engineers Inc., 7393686. (2015 6th International Green and Sustainable Computing Conference).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    Energy Storage and Regulation: An Analysis

    Fooladivanda, D., Rosenberg, C. & Garg, S., Jul 2016, In : IEEE Transactions on Smart Grid. 7, 4, p. 1813-1823 10 p., 7317811.

    Research output: Contribution to journalArticle

    Fragility of the commons under prospect-theoretic risk attitudes

    Hota, A. R., Garg, S. & Sundaram, S., Jul 1 2016, In : Games and Economic Behavior. 98, p. 135-164 30 p.

    Research output: Contribution to journalArticle

    Learning-Based Power/Performance Optimization for Many-Core Systems with Extended-Range Voltage/Frequency Scaling

    Cai, E., Juan, D. C., Garg, S., Park, J. & Marculescu, D., Aug 2016, In : IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 35, 8, p. 1318-1331 14 p., 7339672.

    Research output: Contribution to journalArticle

    Non-deterministic timers for hardware Trojan activation (or how a little randomness can go the wrong way)

    Imeson, F., Nejati, S., Garg, S. & Tripunitara, M., Jan 1 2016.

    Research output: Contribution to conferencePaper

    Non-deterministic timers for hardware Trojan activation (or how a little randomness can go the wrong way)

    Imeson, F., Nejati, S., Garg, S. & Tripunitara, M., Jan 1 2016.

    Research output: Contribution to conferencePaper