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Siddharth Garg

Assistant Professor

    20042020

    Research output per year

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    Research Output

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    Conference contribution
    2013

    Impact of manufacturing process variations on performance and thermal characteristics of 3D ICs: Emerging challenges and new solutions

    Juan, D. C., Garg, S. & Marculescu, D., 2013, 2013 IEEE International Symposium on Circuits and Systems, ISCAS 2013. p. 541-544 4 p. 6571900. (Proceedings - IEEE International Symposium on Circuits and Systems).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    Learning the optimal operating point for many-core systems with extended range voltage/frequency scaling

    Juan, D. C., Garg, S., Park, J. & Marculescu, D., 2013, 2013 International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2013. IEEE Computer Society, p. 1-10 10 p. 6658995. (2013 International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2013).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    Low cost permanent fault detection using ultra-reduced instruction set co-processors

    Ananthanarayan, S., Garg, S. & Patel, H. D., 2013, Proceedings - Design, Automation and Test in Europe, DATE 2013. Institute of Electrical and Electronics Engineers Inc., p. 933-938 6 p. 6513642. (Proceedings -Design, Automation and Test in Europe, DATE).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    Resource sharing games with failures and heterogeneous risk attitudes

    Hota, A. R., Garg, S. & Sundaram, S., 2013, 2013 51st Annual Allerton Conference on Communication, Control, and Computing, Allerton 2013. IEEE Computer Society, p. 535-542 8 p. 6736571. (2013 51st Annual Allerton Conference on Communication, Control, and Computing, Allerton 2013).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    Securing computer hardware using 3D integrated circuit (IC) technology and split manufacturing for obfuscation

    Imeson, F., Emtenan, A., Garg, S. & Tripunitara, M. V., Jan 1 2013, Proceedings of the 22nd USENIX Security Symposium. USENIX Association, p. 495-510 16 p. (Proceedings of the 22nd USENIX Security Symposium).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    Tagged probabilistic simulation based error probability estimation for better-than-worst case circuit design

    Tosson, A., Garg, S. & Anis, M., 2013, 2013 IFIP/IEEE 21st International Conference on Very Large Scale Integration, VLSI-SoC 2013 - Proceedings. IEEE Computer Society, p. 368-373 6 p. 6673311. (IEEE/IFIP International Conference on VLSI and System-on-Chip, VLSI-SoC).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    Vertically-addressed test structures (VATS) for 3D IC variability and stress measurements

    O'Sullivan, C., Levine, P. M. & Garg, S., 2013, Proceedings of the 14th International Symposium on Quality Electronic Design, ISQED 2013. p. 97-103 7 p. 6523596. (Proceedings - International Symposium on Quality Electronic Design, ISQED).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    2012

    Analysis and evaluation of greedy thread swapping based dynamic power management for MPSoC platforms

    Ravishankar, C., Ananthanarayanan, S., Garg, S. & Kennings, A., 2012, Proceedings of the 13th International Symposium on Quality Electronic Design, ISQED 2012. p. 617-624 8 p. 6187557. (Proceedings - International Symposium on Quality Electronic Design, ISQED).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    EmPower: FPGA based rapid prototyping of dynamic power management algorithms for multi-processor systems on chip

    Ravishankar, C., Ananthanarayan, S., Garg, S. & Kennings, A., 2012, Proceedings - 22nd International Conference on Field Programmable Logic and Applications, FPL 2012. p. 41-48 8 p. 6339239. (Proceedings - 22nd International Conference on Field Programmable Logic and Applications, FPL 2012).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    Reliable computing with ultra-reduced instruction set co-processors

    Rajendiran, A., Ananthanarayanan, S., Patel, H. D., Tripunitara, M. V. & Garg, S., 2012, Proceedings of the 49th Annual Design Automation Conference, DAC '12. p. 697-702 6 p. (Proceedings - Design Automation Conference).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    2011

    Special session 4A: New topics parametric yield and reliability of 3D integrated circuits: New challenges and solutions

    Garg, S. & Marculescu, D., 2011, Proceedings - 2011 29th IEEE VLSI Test Symposium, VTS 2011. 1 p. 5783764. (Proceedings of the IEEE VLSI Test Symposium).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    Statistical thermal evaluation and mitigation techniques for 3D chip-multiprocessors in the presence of process variations

    Juan, D. C., Garg, S. & Marculescu, D., 2011, Proceedings - Design, Automation and Test in Europe Conference and Exhibition, DATE 2011. p. 383-388 6 p. 5763067. (Proceedings -Design, Automation and Test in Europe, DATE).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    2010

    Custom Feedback Control: Enabling truly scalable on-chip power management for MPSoCs

    Garg, S., Marculescu, D. & Marculescu, R., 2010, ISLPED'10 - Proceedings of the 16th ACM/IEEE International Symposium on Low-Power Electronics and Design. p. 425-430 6 p. (Proceedings of the International Symposium on Low Power Electronics and Design).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    Process variation aware performance modeling and dynamic power management for multi-core systems

    Garg, S., Marculescu, D. & Herbert, S. X., 2010, 2010 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2010. p. 89-92 4 p. 5654293. (IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    2009

    3D-GCP: an analytical model for the impact of process variations on the critical path delay distribution of 3D ICs

    Garg, S. & Marculescu, D., 2009, Proceedings of the 10th International Symposium on Quality Electronic Design, ISQED 2009. p. 147-155 9 p. 4810285. (Proceedings of the 10th International Symposium on Quality Electronic Design, ISQED 2009).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    System-level process variability analysis and mitigation for 3D MPSoCs

    Garg, S. & Marculescu, D., 2009, Proceedings - 2009 Design, Automation and Test in Europe Conference and Exhibition, DATE '09. Institute of Electrical and Electronics Engineers Inc., p. 604-609 6 p. 5090739. (Proceedings -Design, Automation and Test in Europe, DATE).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    Technology-driven limits on DVFS controllability of multiple voltage-frequency island designs: A system-level perspective

    Garg, S., Marculescu, D., Marculescu, R. & Ogras, U., 2009, 2009 46th ACM/IEEE Design Automation Conference, DAC 2009. p. 818-821 4 p. 5227050. (Proceedings - Design Automation Conference).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    2008

    System-level mitigation of WID leakage power variability using body-bias islands

    Garg, S. & Marculescu, D., 2008, Embedded Systems Week 2008 - Proceedings of the 6th IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2008. p. 273-278 6 p. (Embedded Systems Week 2008 - Proceedings of the 6th IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2008).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    Voting-based active contour segmentation of fmri images of the brain

    Srinivasa, G., Oak, V. S., Garg, S. J., Fickus, M. C. & Kovaĉević, J., 2008, 2008 IEEE International Conference on Image Processing, ICIP 2008 Proceedings. p. 1100-1103 4 p. 4711951. (Proceedings - International Conference on Image Processing, ICIP).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    2007

    On the impact of manufacturing process variations on the lifetime of sensor networks

    Garg, S. & Marculescu, D., 2007, CODES+ISSS 2007: International Conference on Hardware/Software Codesign and System Synthesis. p. 203-208 6 p. (CODES+ISSS 2007: International Conference on Hardware/Software Codesign and System Synthesis).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    System-level process variation driven throughput analysis for single and multiple voltage-frequency island designs

    Garg, S. & Marculescu, D., 2007, Proceedings - 2007 Design, Automation and Test in Europe Conference and Exhibition, DATE 2007. p. 403-408 6 p. 4211830. (Proceedings -Design, Automation and Test in Europe, DATE).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    2006

    System-level process-driven variability analysis for single and multiple voltage-frequency island systems

    Marculescu, D. & Garg, S., 2006, Proceedings of the 2006 International Conference on Computer-Aided Design, ICCAD. p. 541-546 6 p. 4110228. (IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution