A 16-channel wireless neural interfacing SoC with RF-powered energy-replenishing adiabatic stimulation

S. Ha, A. Akinin, J. Park, C. Kim, H. Wang, C. Maier, G. Cauwenberghs, P. P. Mercier

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

This paper presents a fully-integrated 16-channel wireless neural interfacing SoC that employs an adiabatic stimulator powered directly from a 190-MHz on-chip antenna to eliminate bulky external components while simultaneously avoiding rectifier and regulator losses. Using a charge replenishing architecture, the stimulator outputs up to 145-μA, while achieving a 63.1% charge replenishing ratio and a stimulation efficiency factor of 6.0. Analog front-ends (AFEs) and telemetry circuitry are also included.

Original languageEnglish (US)
Title of host publication2015 Symposium on VLSI Circuits, VLSI Circuits 2015
PublisherInstitute of Electrical and Electronics Engineers Inc.
PagesC106-C107
ISBN (Electronic)9784863485020
DOIs
StatePublished - Aug 31 2015
Event29th Annual Symposium on VLSI Circuits, VLSI Circuits 2015 - Kyoto, Japan
Duration: Jun 17 2015Jun 19 2015

Publication series

NameIEEE Symposium on VLSI Circuits, Digest of Technical Papers
Volume2015-August

Other

Other29th Annual Symposium on VLSI Circuits, VLSI Circuits 2015
CountryJapan
CityKyoto
Period6/17/156/19/15

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

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    Ha, S., Akinin, A., Park, J., Kim, C., Wang, H., Maier, C., Cauwenberghs, G., & Mercier, P. P. (2015). A 16-channel wireless neural interfacing SoC with RF-powered energy-replenishing adiabatic stimulation. In 2015 Symposium on VLSI Circuits, VLSI Circuits 2015 (pp. C106-C107). [7231341] (IEEE Symposium on VLSI Circuits, Digest of Technical Papers; Vol. 2015-August). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/VLSIC.2015.7231341