A 600mVPP-Input-Range 94.5dB-SNDR NS-SAR-Nested DSM with 4th-Order Truncation-Error Shaping and Input-Impedance Boosting for Biosignal Acquisition

Kyeongwon Jeong; Gichan Yun; Sohmyung Ha; Minkyu Je

doi:10.1109/VLSITechnologyandCir46769.2022.9830401

A 600mV_PP-Input-Range 94.5dB-SNDR NS-SAR-Nested DSM with 4^th-Order Truncation-Error Shaping and Input-Impedance Boosting for Biosignal Acquisition

Kyeongwon Jeong, Gichan Yun, Sohmyung Ha, Minkyu Je

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

We present a 600mVPP-linear-input-range 94.5dB-SNDR NS-SAR-based DSM with input-impedance (ZIN) boosting for biopotential recording. The proposed direct-conversion ADC utilizes a 1st-order DSM to widen the input range and a 2nd-order noise-shaping SAR (NS-SAR) ADC for high resolution and power efficiency. Also, by feeding the truncation (TRNC) error back to the NS-SAR ADC, the error is shaped in the 4th order, further lowering the noise. Fabricated in 65nm CMOS, the NS-SAR-nested DSM achieves 208MO ZIN at DC, 174.3dB FOMSNDR, and 175.6dB FOMDR, consuming 5.2W.

Original language	English (US)
Title of host publication	2022 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2022
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	52-53
Number of pages	2
ISBN (Electronic)	9781665497725
DOIs	https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830401
State	Published - 2022
Event	2022 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2022 - Honolulu, United States Duration: Jun 12 2022 → Jun 17 2022

Publication series

Name	Digest of Technical Papers - Symposium on VLSI Technology
Volume	2022-June
ISSN (Print)	0743-1562

Conference

Conference	2022 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2022
Country/Territory	United States
City	Honolulu
Period	6/12/22 → 6/17/22

ASJC Scopus subject areas

Electrical and Electronic Engineering

Access to Document

10.1109/VLSITechnologyandCir46769.2022.9830401

Cite this

Jeong, K., Yun, G., Ha, S., & Je, M. (2022). A 600mV_PP-Input-Range 94.5dB-SNDR NS-SAR-Nested DSM with 4^th-Order Truncation-Error Shaping and Input-Impedance Boosting for Biosignal Acquisition. In 2022 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2022 (pp. 52-53). (Digest of Technical Papers - Symposium on VLSI Technology; Vol. 2022-June). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830401

A 600mV_PP-Input-Range 94.5dB-SNDR NS-SAR-Nested DSM with 4^th-Order Truncation-Error Shaping and Input-Impedance Boosting for Biosignal Acquisition. / Jeong, Kyeongwon; Yun, Gichan; Ha, Sohmyung et al.
2022 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2022. Institute of Electrical and Electronics Engineers Inc., 2022. p. 52-53 (Digest of Technical Papers - Symposium on VLSI Technology; Vol. 2022-June).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Jeong, K, Yun, G, Ha, S & Je, M 2022, A 600mV_PP-Input-Range 94.5dB-SNDR NS-SAR-Nested DSM with 4^th-Order Truncation-Error Shaping and Input-Impedance Boosting for Biosignal Acquisition. in 2022 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2022. Digest of Technical Papers - Symposium on VLSI Technology, vol. 2022-June, Institute of Electrical and Electronics Engineers Inc., pp. 52-53, 2022 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2022, Honolulu, United States, 6/12/22. https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830401

Jeong K, Yun G, Ha S, Je M. A 600mV_PP-Input-Range 94.5dB-SNDR NS-SAR-Nested DSM with 4^th-Order Truncation-Error Shaping and Input-Impedance Boosting for Biosignal Acquisition. In 2022 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2022. Institute of Electrical and Electronics Engineers Inc. 2022. p. 52-53. (Digest of Technical Papers - Symposium on VLSI Technology). doi: 10.1109/VLSITechnologyandCir46769.2022.9830401

Jeong, Kyeongwon ; Yun, Gichan ; Ha, Sohmyung et al. / A 600mV_PP-Input-Range 94.5dB-SNDR NS-SAR-Nested DSM with 4^th-Order Truncation-Error Shaping and Input-Impedance Boosting for Biosignal Acquisition. 2022 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2022. Institute of Electrical and Electronics Engineers Inc., 2022. pp. 52-53 (Digest of Technical Papers - Symposium on VLSI Technology).

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abstract = "We present a 600mVPP-linear-input-range 94.5dB-SNDR NS-SAR-based DSM with input-impedance (ZIN) boosting for biopotential recording. The proposed direct-conversion ADC utilizes a 1st-order DSM to widen the input range and a 2nd-order noise-shaping SAR (NS-SAR) ADC for high resolution and power efficiency. Also, by feeding the truncation (TRNC) error back to the NS-SAR ADC, the error is shaped in the 4th order, further lowering the noise. Fabricated in 65nm CMOS, the NS-SAR-nested DSM achieves 208MO ZIN at DC, 174.3dB FOMSNDR, and 175.6dB FOMDR, consuming 5.2W.",

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