TY - GEN
T1 - A case for efficient accelerator design space exploration via Bayesian optimization
AU - Reagen, Brandon
AU - Hernandez-Lobato, Jose Miguel
AU - Adolf, Robert
AU - Gelbart, Michael
AU - Whatmough, Paul
AU - Wei, Gu Yeon
AU - Brooks, David
N1 - Funding Information:
This work was partially supported by C-FAR, one of six centers of STARnet, a Semiconductor Research Corporation program sponsored by MARCO and DARPA. This research was, in part, funded by the U.S. Government under the DARPA CRAFT and PERFECT programs (Contract #: HR0011-13-C-0022). Intel Corporation also provided support. 1.M.H.L. acknowledges support from the Rafael dei Pino Foundation. The views and conclusions contained in this document are those of the authors and should not be interpreted as representing the official policies, either expressed or implied, of the D.S. Government or other sponsors.
Publisher Copyright:
© 2017 IEEE.
PY - 2017/8/11
Y1 - 2017/8/11
N2 - In this paper we propose using machine learning to improve the design of deep neural network hardware accelerators. We show how to adapt multi-objective Bayesian optimization to overcome a challenging design problem: Optimizing deep neural network hardware accelerators for both accuracy and energy efficiency. DNN accelerators exhibit all aspects of a challenging optimization space: The landscape is rough, evaluating designs is expensive, the objectives compete with each other, and both design spaces (algorithmic and microarchitectural) are unwieldy. With multi-objective Bayesian optimization, the design space exploration is made tractable and the design points found vastly outperform traditional methods across all metrics of interest.
AB - In this paper we propose using machine learning to improve the design of deep neural network hardware accelerators. We show how to adapt multi-objective Bayesian optimization to overcome a challenging design problem: Optimizing deep neural network hardware accelerators for both accuracy and energy efficiency. DNN accelerators exhibit all aspects of a challenging optimization space: The landscape is rough, evaluating designs is expensive, the objectives compete with each other, and both design spaces (algorithmic and microarchitectural) are unwieldy. With multi-objective Bayesian optimization, the design space exploration is made tractable and the design points found vastly outperform traditional methods across all metrics of interest.
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U2 - 10.1109/ISLPED.2017.8009208
DO - 10.1109/ISLPED.2017.8009208
M3 - Conference contribution
AN - SCOPUS:85028590987
T3 - Proceedings of the International Symposium on Low Power Electronics and Design
BT - ISLPED 2017 - IEEE/ACM International Symposium on Low Power Electronics and Design
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 22nd IEEE/ACM International Symposium on Low Power Electronics and Design, ISLPED 2017
Y2 - 24 July 2017 through 26 July 2017
ER -