A case for efficient accelerator design space exploration via Bayesian optimization

Brandon Reagen; Jose Miguel Hernandez-Lobato; Robert Adolf; Michael Gelbart; Paul Whatmough; Gu Yeon Wei; David Brooks

doi:10.1109/ISLPED.2017.8009208

A case for efficient accelerator design space exploration via Bayesian optimization

Brandon Reagen, Jose Miguel Hernandez-Lobato, Robert Adolf, Michael Gelbart, Paul Whatmough, Gu Yeon Wei, David Brooks

Electrical and Computer Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

In this paper we propose using machine learning to improve the design of deep neural network hardware accelerators. We show how to adapt multi-objective Bayesian optimization to overcome a challenging design problem: Optimizing deep neural network hardware accelerators for both accuracy and energy efficiency. DNN accelerators exhibit all aspects of a challenging optimization space: The landscape is rough, evaluating designs is expensive, the objectives compete with each other, and both design spaces (algorithmic and microarchitectural) are unwieldy. With multi-objective Bayesian optimization, the design space exploration is made tractable and the design points found vastly outperform traditional methods across all metrics of interest.

Original language	English (US)
Title of host publication	ISLPED 2017 - IEEE/ACM International Symposium on Low Power Electronics and Design
Publisher	Institute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)	9781509060238
DOIs	https://doi.org/10.1109/ISLPED.2017.8009208
State	Published - Aug 11 2017
Event	22nd IEEE/ACM International Symposium on Low Power Electronics and Design, ISLPED 2017 - Taipei, Taiwan, Province of China Duration: Jul 24 2017 → Jul 26 2017

Publication series

Name	Proceedings of the International Symposium on Low Power Electronics and Design
Volume	0
ISSN (Print)	1533-4678

Conference

Conference	22nd IEEE/ACM International Symposium on Low Power Electronics and Design, ISLPED 2017
Country/Territory	Taiwan, Province of China
City	Taipei
Period	7/24/17 → 7/26/17

ASJC Scopus subject areas

General Engineering

Access to Document

10.1109/ISLPED.2017.8009208

Cite this

Reagen, B., Hernandez-Lobato, J. M., Adolf, R., Gelbart, M., Whatmough, P., Wei, G. Y., & Brooks, D. (2017). A case for efficient accelerator design space exploration via Bayesian optimization. In ISLPED 2017 - IEEE/ACM International Symposium on Low Power Electronics and Design Article 8009208 (Proceedings of the International Symposium on Low Power Electronics and Design; Vol. 0). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ISLPED.2017.8009208

A case for efficient accelerator design space exploration via Bayesian optimization. / Reagen, Brandon; Hernandez-Lobato, Jose Miguel; Adolf, Robert et al.
ISLPED 2017 - IEEE/ACM International Symposium on Low Power Electronics and Design. Institute of Electrical and Electronics Engineers Inc., 2017. 8009208 (Proceedings of the International Symposium on Low Power Electronics and Design; Vol. 0).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Reagen, B, Hernandez-Lobato, JM, Adolf, R, Gelbart, M, Whatmough, P, Wei, GY & Brooks, D 2017, A case for efficient accelerator design space exploration via Bayesian optimization. in ISLPED 2017 - IEEE/ACM International Symposium on Low Power Electronics and Design., 8009208, Proceedings of the International Symposium on Low Power Electronics and Design, vol. 0, Institute of Electrical and Electronics Engineers Inc., 22nd IEEE/ACM International Symposium on Low Power Electronics and Design, ISLPED 2017, Taipei, Taiwan, Province of China, 7/24/17. https://doi.org/10.1109/ISLPED.2017.8009208

Reagen B, Hernandez-Lobato JM, Adolf R, Gelbart M, Whatmough P, Wei GY et al. A case for efficient accelerator design space exploration via Bayesian optimization. In ISLPED 2017 - IEEE/ACM International Symposium on Low Power Electronics and Design. Institute of Electrical and Electronics Engineers Inc. 2017. 8009208. (Proceedings of the International Symposium on Low Power Electronics and Design). doi: 10.1109/ISLPED.2017.8009208

Reagen, Brandon ; Hernandez-Lobato, Jose Miguel ; Adolf, Robert et al. / A case for efficient accelerator design space exploration via Bayesian optimization. ISLPED 2017 - IEEE/ACM International Symposium on Low Power Electronics and Design. Institute of Electrical and Electronics Engineers Inc., 2017. (Proceedings of the International Symposium on Low Power Electronics and Design).

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AB - In this paper we propose using machine learning to improve the design of deep neural network hardware accelerators. We show how to adapt multi-objective Bayesian optimization to overcome a challenging design problem: Optimizing deep neural network hardware accelerators for both accuracy and energy efficiency. DNN accelerators exhibit all aspects of a challenging optimization space: The landscape is rough, evaluating designs is expensive, the objectives compete with each other, and both design spaces (algorithmic and microarchitectural) are unwieldy. With multi-objective Bayesian optimization, the design space exploration is made tractable and the design points found vastly outperform traditional methods across all metrics of interest.

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A case for efficient accelerator design space exploration via Bayesian optimization

Abstract

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