A case for efficient accelerator design space exploration via Bayesian optimization

Brandon Reagen, Jose Miguel Hernandez-Lobato, Robert Adolf, Michael Gelbart, Paul Whatmough, Gu Yeon Wei, David Brooks

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

In this paper we propose using machine learning to improve the design of deep neural network hardware accelerators. We show how to adapt multi-objective Bayesian optimization to overcome a challenging design problem: Optimizing deep neural network hardware accelerators for both accuracy and energy efficiency. DNN accelerators exhibit all aspects of a challenging optimization space: The landscape is rough, evaluating designs is expensive, the objectives compete with each other, and both design spaces (algorithmic and microarchitectural) are unwieldy. With multi-objective Bayesian optimization, the design space exploration is made tractable and the design points found vastly outperform traditional methods across all metrics of interest.

Original languageEnglish (US)
Title of host publicationISLPED 2017 - IEEE/ACM International Symposium on Low Power Electronics and Design
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781509060238
DOIs
StatePublished - Aug 11 2017
Event22nd IEEE/ACM International Symposium on Low Power Electronics and Design, ISLPED 2017 - Taipei, Taiwan, Province of China
Duration: Jul 24 2017Jul 26 2017

Publication series

NameProceedings of the International Symposium on Low Power Electronics and Design
Volume0
ISSN (Print)1533-4678

Conference

Conference22nd IEEE/ACM International Symposium on Low Power Electronics and Design, ISLPED 2017
CountryTaiwan, Province of China
CityTaipei
Period7/24/177/26/17

ASJC Scopus subject areas

  • Engineering(all)

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