A design space exploration methodology for parameter optimization in multicore processors

Prasanna Kansakar, Arslan Munir

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Due to the increasing proliferation of computing systems in diverse application domains, the need for application-specific design of multicore/manycore processing platforms is paramount. In order to tailor processors for application-specific requirements, a multitude of processor design parameters need to be tuned accordingly. Tuning of processor design parameters involves rigorous and extensive design space exploration over large search spaces. In this paper, we propose an efficient design space exploration methodology for multicore parameter optimization. Our proposed methodology includes an intelligent initial parameter setting algorithm, the results of which are leveraged by two search algorithms - exhaustive search and greedy search. We evaluate the methodology in a cycle-accurate simulator (ESESC) using standard set of PARSEC and SPLASH2 benchmarks for applications with low-power and high-performance requirements. The results reveal that the quality of solutions (design configurations) obtained from our methodology are within 1.35%-3.69% of the solutions obtained from fully exhaustive search while only exploring 2.74%-3% of the design space. Our methodology achieves on average a 35.32x speedup in design space exploration time as compared to fully exhaustive search in finding the best processor design configuration.

Original languageEnglish (US)
Title of host publicationProceedings - IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2016
PublisherIEEE Computer Society
Pages613-618
Number of pages6
ISBN (Electronic)9781467390385
DOIs
StatePublished - Sep 2 2016
Event15th IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2016 - Pittsburgh, United States
Duration: Jul 11 2016Jul 13 2016

Publication series

NameProceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI
Volume2016-September
ISSN (Print)2159-3469
ISSN (Electronic)2159-3477

Other

Other15th IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2016
Country/TerritoryUnited States
CityPittsburgh
Period7/11/167/13/16

Keywords

  • design space exploration
  • multicore/manycore processors
  • parameter optimization
  • processor design parameters

ASJC Scopus subject areas

  • Hardware and Architecture
  • Control and Systems Engineering
  • Electrical and Electronic Engineering

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