A Disquisition on Logic Locking

Abishek Chakraborty, Nityashankari Gummidipoondi Jayasankaran, Yuntao Liu, Jeyavijayan Rajendran, Ozgur Sinanoglu, Ankur Srivastava, Yang Xie, Muhammad Yasin, Michael Zuzak

Research output: Contribution to journalArticlepeer-review


The fabless business model has given rise to many security threats, including piracy of intellectual property (IP), overproduction, counterfeiting, reverse engineering (RE), and hardware Trojans (HT). Such threats severely undermine the benefits of the fabless model. Among the countermeasures developed to thwart piracy and RE attacks, logic locking has emerged as a promising and versatile solution that is being adopted by both academia and industry. The idea behind logic locking is to lock the design using a “keying” mechanism; only the rightful owner has control over the locked design. Therefore, the design remains non-functional without the knowledge of the key. In this paper, we survey the evolution of logic locking over the last decade. We introduce various “cat and mouse” games involved in logic locking along with its novel applications—including, processor pipelines, graphics-processing units (GPUs), and analog circuits. We aim this paper to be a primer for researchers interested in developing new logic locking techniques and employing logic locking in different application domains.
Original languageEnglish (US)
Article number10.1109/TCAD.2019.2944586
Pages (from-to)1-1
Number of pages14
JournalIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
StateE-pub ahead of print - Sep 30 2019


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