A dual-level matching algorithm for 3-stage Clos-network packet switches

H. Jonathan Chao, Soung Y. Liew, Zhigang Jing

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

In this paper, we present a new dual-level matching algorithm for 3-stage Clos-network packet switches, called d-MAC. Using a two-level matching algorithm, namely module-level matching and port-level matching, d-MAC is highly scalable and maintains high system performance. The module-level matching is responsible for finding the module-to-module matching according to the queue status of the switch, while the port-level matching is responsible for determining port-to-port matching and route assignment simultaneously. The two-level matchings are computed in a pipelined and parallel manner to speed up packet scheduling.

Original languageEnglish (US)
Title of host publicationProceedings - 11th Symposium on High Performance Interconnects, HOTI 2003
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages38-43
Number of pages6
ISBN (Electronic)076952012X, 9780769520124
DOIs
StatePublished - 2003
Event11th Symposium on High Performance Interconnects, HOTI 2003 - Stanford, United States
Duration: Aug 20 2003Aug 22 2003

Publication series

NameProceedings - 11th Symposium on High Performance Interconnects, HOTI 2003

Other

Other11th Symposium on High Performance Interconnects, HOTI 2003
CountryUnited States
CityStanford
Period8/20/038/22/03

Keywords

  • Chaos
  • Fabrics
  • Internet
  • Packet switching
  • Round robin
  • Routing
  • Scheduling algorithm
  • Switches
  • System performance
  • Traffic control

ASJC Scopus subject areas

  • Computer Networks and Communications
  • Hardware and Architecture

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