A Fast Design Space Exploration Framework for the Deep Learning Accelerators: Work-in-Progress

Alessio Colucci, Alberto Marchisio, Beatrice Bussolino, Voitech Mrazek, Maurizio Martina, Guido Masera, Muhammad Shafique

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

The Capsule Networks (CapsNets) is an advanced form of Convolutional Neural Network (CNN), capable of learning spatial relations and being invariant to transformations. CapsNets requires complex matrix operations which current accelerators are not optimized for, concerning both training and inference passes. Current state-of-The-Art simulators and design space exploration (DSE) tools for DNN hardware neglect the modeling of training operations, while requiring long exploration times that slow down the complete design flow. These impediments restrict the real-world applications of CapsNets (e.g., autonomous driving and robotics) as well as the further development of DNNs in life-long learning scenarios that require training on low-power embedded devices. Towards this, we present XploreDL, a novel framework to perform fast yet high-fidelity DSE for both inference and training accelerators, supporting both CNNs and CapsNets operations. XploreDL enables a resource-efficient DSE for accelerators, focusing on power, area, and latency, highlighting Pareto-optimal solutions which can be a green-lit to expedite the design flow. XploreDL can reach the same fidelity as ARM's SCALE-sim, while providing 600x speedup and having a 50x lower memory-footprint. Preliminary results with a deep CapsNet model on MNIST for training accelerators show promising Pareto-optimal architectures with up to 0.4 TOPS/squared-mm and 800 fJ/op efficiency. With inference accelerators for AlexNet the Pareto-optimal solutions reach up to 1.8 TOPS/squared-mm and 200 fJ/op efficiency.

Original languageEnglish (US)
Title of host publicationProceedings of the 2020 International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2020
EditorsTulika Mitra, Andreas Gerstlauer
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages34-36
Number of pages3
ISBN (Electronic)9781728191980
DOIs
StatePublished - Sep 20 2020
Event2020 International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2020 - Virtual, Online, Singapore
Duration: Sep 20 2020Sep 25 2020

Publication series

NameProceedings of the 2020 International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2020

Conference

Conference2020 International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2020
Country/TerritorySingapore
CityVirtual, Online
Period9/20/209/25/20

Keywords

  • Capsule Networks
  • Convolutional Neural Networks
  • Design Space Exploration
  • Hardware Accelerator
  • Training

ASJC Scopus subject areas

  • Artificial Intelligence
  • Hardware and Architecture
  • Software

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