A feasibility study of hierarchical multithreading

M. M. Zahran, M. Franklin

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Many studies have shown that significant amounts of parallelism exist at different granularities. Execution models such as superscalar and VLIW exploit parallelism from a single thread. Multithreaded processors make a step towards exploiting parallelism from different threads, but are not geared to exploit parallelism at different granularities (fine and medium grain). We present a feasibility study of a new execution model for exploiting both adjacent and distant parallelism in the dynamic instruction stream. Our model, called hierarchical multithreading, uses a two-level hierarchical arrangement of processing elements. The lower level of the hierarchy exploits instruction-level parallelism and fine-grain thread-level parallelism, whereas the upper level exploits more distant parallelism. Detailed simulation studies with a cycle accurate simulator are presented, showing the feasibility of hierarchical multithreading. Conclusions are drawn about the best ways to obtain the most front the hierarchical multithreading scheme.

Original languageEnglish (US)
Title of host publicationProceedings - International Parallel and Distributed Processing Symposium, IPDPS 2002
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages588-593
Number of pages6
ISBN (Electronic)0769515738, 9780769515731
DOIs
StatePublished - 2002
Event16th International Parallel and Distributed Processing Symposium, IPDPS 2002 - Ft. Lauderdale, United States
Duration: Apr 15 2002Apr 19 2002

Publication series

NameProceedings - International Parallel and Distributed Processing Symposium, IPDPS 2002

Other

Other16th International Parallel and Distributed Processing Symposium, IPDPS 2002
CountryUnited States
CityFt. Lauderdale
Period4/15/024/19/02

ASJC Scopus subject areas

  • Computer Networks and Communications
  • Modeling and Simulation

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    Zahran, M. M., & Franklin, M. (2002). A feasibility study of hierarchical multithreading. In Proceedings - International Parallel and Distributed Processing Symposium, IPDPS 2002 (pp. 588-593). [1015555] (Proceedings - International Parallel and Distributed Processing Symposium, IPDPS 2002). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/IPDPS.2002.1015555