TY - GEN
T1 - A hazard-free majority voter for tmr-based fault tolerance in asynchronous circuits
AU - Almukhaizim, Sobeeh
AU - Sinanoglu, Ozgur
PY - 2007
Y1 - 2007
N2 - Triple-Modular Redundancy (TMR) is the simplest and most effective fault tolerant design method for ICs, where three copies of a given circuit are employed and a majority voter produces the voted output. Asynchronous circuits, however, exhibit various characteristics that limit the applicability of TMR on such designs. Specifically, the difficulty stems from the fact that asynchronous circuits communicate with their environment through hazard-free output transitions. This hazard-free property needs to be preserved when hardware providing fault tolerance is added. Therefore, performing TMR-based fault tolerance in asynchronous circuits requires the development of a hazard-free majority voter. In this work, we first demonstrate how and why a typical majority voter design would fail to preserve the hazard-free property of its response when a transient error occurs at one of its inputs. We then propose a novel hazard-free majority voter design for the TMR-based fault tolerant method. Finally, using PSpice simulations, we verify the effectiveness of the proposed voter design in preserving the hazard-free property of the response of an asynchronous circuit, and we assess its area overhead over that of a typical majority voter.
AB - Triple-Modular Redundancy (TMR) is the simplest and most effective fault tolerant design method for ICs, where three copies of a given circuit are employed and a majority voter produces the voted output. Asynchronous circuits, however, exhibit various characteristics that limit the applicability of TMR on such designs. Specifically, the difficulty stems from the fact that asynchronous circuits communicate with their environment through hazard-free output transitions. This hazard-free property needs to be preserved when hardware providing fault tolerance is added. Therefore, performing TMR-based fault tolerance in asynchronous circuits requires the development of a hazard-free majority voter. In this work, we first demonstrate how and why a typical majority voter design would fail to preserve the hazard-free property of its response when a transient error occurs at one of its inputs. We then propose a novel hazard-free majority voter design for the TMR-based fault tolerant method. Finally, using PSpice simulations, we verify the effectiveness of the proposed voter design in preserving the hazard-free property of the response of an asynchronous circuit, and we assess its area overhead over that of a typical majority voter.
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U2 - 10.1109/IDT.2007.4437437
DO - 10.1109/IDT.2007.4437437
M3 - Conference contribution
AN - SCOPUS:44949174933
SN - 9781424418251
T3 - Proceedings - IDT'07 The 2nd International Design and Test Workshop
SP - 93
EP - 98
BT - Proceedings - IDT'07 The 2nd International Design and Test Workshop
T2 - 2nd international Design and Test Workshop, IDT 2007
Y2 - 16 December 2007 through 18 December 2007
ER -