A High-throughput Impedance Measurement IC Using Synchronous Cyclic Integration Technique

Karam Ellahi, Soon Jae Kweon, Asra Malik, Muhammad Abrar Akram, Song I. Cheon, Yoontae Jung, Minkyu Je, Hammad M. Cheema, Sohmyung Ha

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

This paper presents a high-throughput impedance readout IC with a novel synchronous cyclic integration technique using a scalable capacitive transimpedance stage. The proposed technique removes the need for the low pass filter (LPF) in the readout chain and performs the I/Q demodulation within a single cycle. Fabricated in a 180-nm CMOS process, the proposed IC consumes 50 μW from a 1.2-V supply. It can measure impedances over a frequency of 100 Hz to 100 kHz with an accuracy of 99.7% and can achieve a throughput of 50 kSps at 100 kHz input frequency.

Original languageEnglish (US)
Title of host publicationISCAS 2024 - IEEE International Symposium on Circuits and Systems
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9798350330991
DOIs
StatePublished - 2024
Event2024 IEEE International Symposium on Circuits and Systems, ISCAS 2024 - Singapore, Singapore
Duration: May 19 2024May 22 2024

Publication series

NameProceedings - IEEE International Symposium on Circuits and Systems
ISSN (Print)0271-4310

Conference

Conference2024 IEEE International Symposium on Circuits and Systems, ISCAS 2024
Country/TerritorySingapore
CitySingapore
Period5/19/245/22/24

Keywords

  • Bio-impedance
  • accuracy
  • electrical impedance tomography
  • high-throughput
  • low power
  • synchronous cyclic integration

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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