@inproceedings{fa8b56a857024aa1ab6db0ecfecd4104,
title = "A High-throughput Impedance Measurement IC with Baseline-Canceling Peak Detector",
abstract = "This paper presents a novel high-throughput impedance measurement integrated circuit (IC) with baseline cancellation for neural EIT applications. The proposed technique uses a peak detector to obtain impedance magnitude every cycle. After taking the peak, the peak detector is reset to a DC baseline voltage. And, the signal swinging between the amplitude and the reset baseline is further amplified, allowing to measure small impedance variations even with a large baseline. The proposed IC fabricated in a 180-nm standard CMOS process can measure impedance variations of >0.1% baseline can be measured, while achieving high throughput of 100 kS/s at 100 kHz input frequency. Scalable design allows the proposed IC to support a wide frequency range from 100 Hz to 100 kHz with a power consumption from 31 μW to 39 μW from a 1.2-V supply.",
keywords = "Neural EIT, baseline cancellation, frame rate, high throughput, low power, peak detection",
author = "Asra Malik and Kweon, {Soon Jae} and Karam Ellahi and Akram, {Muhammad Abrar} and Cheon, {Song I.} and Yoontae Jung and Minkyu Je and Cheema, {Hammad M.} and Sohmyung Ha",
note = "Publisher Copyright: {\textcopyright} 2024 IEEE.; 2024 IEEE International Symposium on Circuits and Systems, ISCAS 2024 ; Conference date: 19-05-2024 Through 22-05-2024",
year = "2024",
doi = "10.1109/ISCAS58744.2024.10557915",
language = "English (US)",
series = "Proceedings - IEEE International Symposium on Circuits and Systems",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
booktitle = "ISCAS 2024 - IEEE International Symposium on Circuits and Systems",
}