A highly robust distributed fault-tolerant routing algorithm for NoCs with localized rerouting

Arseniy Vitkovskiy, Vassos Soteriou, Chrysostomos Nicopoulos

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Denser transistor integration has enabled the fabrication of multi-tile chips, however, at the expense of higher susceptibility to defects and wear-out. Metal wires comprising the links of Networks-on-Chip (NoCs) are especially vulnerable to such defects, which can render some links disconnected. This paper presents a new fault-tolerant routing scheme to sustain on-chip communication. It uses a localized re-routing approach, whereby de-touring around faulty links - or complex regions of faults - is done locally at each node in a purely distributed and dynamic manner, while guaranteeing deadlock- and livelock-freedom. Results using synthetic traffic and real applications with full-system simulations prove its efficacy in addressing a large percentage of NoC links being faulty albeit at a gracefully degraded performance mode.

Original languageEnglish (US)
Title of host publicationProceedings of the 2012 Interconnection Network Architecture
Subtitle of host publicationOn-Chip, Multi-Chip Workshop, INA-OCMC'12
Pages29-32
Number of pages4
DOIs
StatePublished - 2012
Event2012 Interconnection Network Architecture: On-Chip, Multi-Chip Workshop, INA-OCMC'12 - Paris, France
Duration: Jan 25 2012Jan 25 2012

Publication series

NameACM International Conference Proceeding Series

Other

Other2012 Interconnection Network Architecture: On-Chip, Multi-Chip Workshop, INA-OCMC'12
CountryFrance
CityParis
Period1/25/121/25/12

Keywords

  • fault-tolerance
  • on-chip networks
  • routing algorithm

ASJC Scopus subject areas

  • Software
  • Human-Computer Interaction
  • Computer Vision and Pattern Recognition
  • Computer Networks and Communications

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