A Low complexity scheduling algorithm for a crosspoint buffered switch with 100% throughput

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Crosspoint buffered switches are emerging as the focus of research in high-speed routers. They have simpler scheduling algorithms, and achieve better performance than a bufferless crossbar switch. Crosspoint buffered switches have a buffer at each crosspoint. A cell is first delivered to a crosspoint buffer, and then transferred to the output port. With a speedup of two, a crosspoint buffered switch has previously been proved to provide 100% throughput. In this paper, we propose a 100% throughput scheduling algorithm without speedup, called SQUID. With this design, each input/output keeps track of the previously served virtual output queues (VOQs)/crosspoint buffers. We prove that SQUID, with a time complexity of 0(log N), can achieve 100% throughput without any speedup. Our simulation results also show a delay performance comparable to output- queued switches. We also present a novel queuing model that models crosspoint buffered switches under uniform traffic.

Original languageEnglish (US)
Title of host publication2008 International Conference on High Performance Switching and Routing, HPSR 2008
Pages189-196
Number of pages8
DOIs
StatePublished - 2008
Event2008 International Conference on High Performance Switching and Routing, HPSR 2008 - Shanghai, China
Duration: May 15 2008May 17 2008

Publication series

Name2008 International Conference on High Performance Switching and Routing, HPSR 2008

Other

Other2008 International Conference on High Performance Switching and Routing, HPSR 2008
CountryChina
CityShanghai
Period5/15/085/17/08

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering

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  • Cite this

    Shen, Y., Panwar, S. S., & Chao, H. J. (2008). A Low complexity scheduling algorithm for a crosspoint buffered switch with 100% throughput. In 2008 International Conference on High Performance Switching and Routing, HPSR 2008 (pp. 189-196). [4734442] (2008 International Conference on High Performance Switching and Routing, HPSR 2008). https://doi.org/10.1109/HSPR.2008.4734442