A Low-power Δ-ΔΣ-based Bio-impedance Readout IC with Capacitive-feedback Baseline Cancellation

The measurement of small variation of the bioZ having a substantially large baseline impedance is a great challenge, requiring a wide dynamic range (DR) and a high signal-to-noise ratio (SNR). This paper presents a new impedance measurement architecture based on Δ-ΔΣ modulator with capacitive-feedback baseline cancellation. The readout front-end (RFE) of the integrated circuit (IC) is configured with a first-order Δ-ΔΣ modulator and a feedback capacitive digital-to-analog converter (CDAC) that minimize the power consumption. The front-stage Δ-modulation allows to achieve a wide input DR of 30 kΩ by eliminating the large static baseline impedance with no static current consumption. It also mitigates the input-dependent noise characteristic of the current balancing instrumentation amplifier (CBIA) significantly. The current generator (CG) generates a square wave for the excitation current with a current magnitude ranging from 5 μA_pk to 100 μA_pk over a frequency range from 1 kHz to 1024 kHz. The chopping and dynamic element matching (DEM) techniques are adopted in the bandgap reference (BGR), CG, and current-DAC (IDAC) to mitigate their flicker noises, which dominate the signal bandwidth (<10 Hz). The proposed IC designed in a 180-nm CMOS process consumes only 7.64 μW for the I path of the RFE, achieving a maximum SNR of 97.7 dB.