A pipelined maximal-sized matching scheme for high-speed input-buffered switches

Eiji Oki, Roberto Rojas-Cessa, H. Jonathan Chao

Research output: Contribution to journalArticle

Abstract

This paper proposes an innovative Pipeline-based Maximal-sized Matching scheduling approach, called PMM, for input-buffered switches. It dramatically relaxes the limitation of a single time slot for completing a maximal matching into any number of time slots. In the PMM approach, arbitration is operated in a pipelined manner, where K subschedulers are used. Each subscheduler is allowed to take more than one time slot for its matching. Every time slot, one of the sub-schedulers provides the matching result. We adopt an extended version of Dual Round-Robin Matching (DRRM), called iterative DRRM (iDRRM), as a maximal matching algorithm in a subscheduler. PMM maximizes the efficiency of the adopted arbitration scheme by allowing sufficient time for the number of iterations. We show that PMM preserves 100% throughput under uniform traffic and fairness for best-effort traffic of the non-pipelined adopted algorithm, while ensuring that cells from the same virtual output queue (VOQ) are transmitted in sequence. In addition, we confirm that the delay performance of PMM is not significantly degraded by increasing the pipeline degree, or the number of subschedulers, when the number of outstanding requests for each subscheduler from a VOQ is limited to 1.

Original languageEnglish (US)
Pages (from-to)1302-1311
Number of pages10
JournalIEICE Transactions on Communications
VolumeE85-B
Issue number7
StatePublished - Jul 2002

Keywords

  • Input-buffered switch
  • Maximal-sized matching
  • Pipeline
  • Scheduling

ASJC Scopus subject areas

  • Software
  • Computer Networks and Communications
  • Electrical and Electronic Engineering

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