This paper presents an impedance-measurement integrated circuit (IC) that extends the input frequency range to 10 MHz at low power consumption. The proposed IC directly measures the magnitude and phase of the target impedance while adopting a reference resistor, which is connected in series with the target impedance, to obviate the nonideal delays that may be introduced by the voltage-controlled current source and the receiver's signal processing paths. on the receiver side of the IC, a frequency shift is performed by a chopper in front of the first-stage instrumentation amplifier (IA). The chopper down-converts the frequency of the incoming signal, which ranges to 10 MHz, to a common intermediate frequency of 10 kHz. As a result, the requirements on the IA bandwidth and the comparator delay are greatly relaxed, leading to a significant power saving. Furthermore, this technique improves the phase accuracy because the time interval corresponding to the phase at a high frequency increases at the down-converted frequency. Finally, the auto-zeroing technique is used to cancel out the comparator offset, thus reducing the magnitude and phase errors. The proposed IC designed in a 180-nm CMOS process consumes only 544 µW for a frequency range from 100 Hz to 10 MHz with the maximum magnitude and phase errors of 1.0% and 1.8◦, respectively.