@inproceedings{b2c186bff60849afa84a2f8234bbfa7e,
title = "A Tri-loop Fast-transient Digital LDO with Adaptive-gain Control and Fine-loop Freezer",
abstract = "In this paper, a fully-integrated digital low dropout (DLDO) regulator is proposed utilizing a multi-bits shift handler (MBSH), decremental-gain PMOS array, and adaptive coarse loop controller to achieve fast load transient responses with improved line and load regulations. An undershoot-limiter loop (ULL) is also proposed to help to reduce the voltage undershoot peak during load current transients. To significantly mitigate the steady-state voltage ripples (VRIPP) and quiescent current (IQ), we propose a synchronized fine-loop freezer (FLF) in the fine loop of the DLDO that is only activated when VREG gets equal to VREF. The proposed DLDO was designed and fabricated in a 180-nm CMOS process with an active area of 0.22 mm2. The simulation results demonstrate that the proposed DLDO achieves ≤ 130 μV of VRIPP while maintaining a minimum dropout voltage of 20 mV and a peak current efficiency of 99.96 %.",
keywords = "adaptive-controller, Digital LDO, loop freezer, ripple-less, undershoot limiter",
author = "Farooq, {Muhammad Haris} and Akram, {Abrar Muhammad} and Shirin Qaisar and Kweon, {Soon Jae} and Cheema, {Hammad M.} and Sohmyung Ha",
note = "Publisher Copyright: {\textcopyright} 2024 IEEE.; 2024 IEEE International Symposium on Circuits and Systems, ISCAS 2024 ; Conference date: 19-05-2024 Through 22-05-2024",
year = "2024",
doi = "10.1109/ISCAS58744.2024.10558004",
language = "English (US)",
series = "Proceedings - IEEE International Symposium on Circuits and Systems",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
booktitle = "ISCAS 2024 - IEEE International Symposium on Circuits and Systems",
}