A VLSI Sequencer chip for ATM traffic shaper and queue manager

H. Jonathan Chao, Necdet Uzun

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

The asynchronous transfer mode (ATM) technique provides a standardized and flexible scheme to transport and switch traffic effectively for different services. To provide satisfactory quality of service (QOS) to all users on the network, it is necessary to control the users' traffic so that network resources, such as transmission bandwidth and buffer capacity, can be efficiently and fairly utilized by all the users while still meeting the individual QOS requirement. However, due to the natural randomness of the broadband traffic (e.g., data file transfer and variable bit-rate video communication), it is difficult to control users' traffic effectively so that network congestion is prevented or, at least, occurs rarely. In this paper, we propose to control users' traffic at two places in the network: at the user-network interface (UNI) by a traffic enforcer, and at the network-node interface (NNI) by a queue manager. The traffic enforcer adopted in our work contains a buffer to delay and reshape the violating cells that do not comply with some agreed-upon traffic parameters, and thus is also called a traffic shaper. The queue manager manages the queued cells in network nodes in such a way that higher priority cells are always served first, low priority cells are discarded when the queue is full, and any interference between same-priority cells is prevented. We present in the paper our proposed architectures for the traffic shaper and the queue manager. We have implemented and tested a key component, called the Sequencer chip, to realize both architectures. The Sequencer chip is implemented using 1.2-μm CMOS technology. It contains about 150k transistors, has a die size of 7.5 mm × 8.3 mm, and is packaged in a 223-pin ceramic pin grid array (PGA) carrier.

Original languageEnglish (US)
Title of host publicationGLOBECOM 1992 - Communication for Global Users
Subtitle of host publicationIEEE Global Telecommunications Conference
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages1276-1281
Number of pages6
ISBN (Electronic)0780306082, 9780780306080
DOIs
StatePublished - 1992
Event1992 IEEE Global Telecommunications Conference: Communication for Global Users, GLOBECOM 1992 - Orlando, United States
Duration: Dec 6 1992Dec 9 1992

Publication series

NameGLOBECOM 1992 - Communication for Global Users: IEEE Global Telecommunications Conference

Conference

Conference1992 IEEE Global Telecommunications Conference: Communication for Global Users, GLOBECOM 1992
CountryUnited States
CityOrlando
Period12/6/9212/9/92

ASJC Scopus subject areas

  • Computer Networks and Communications
  • Hardware and Architecture
  • Information Systems
  • Information Systems and Management
  • Safety, Risk, Reliability and Quality

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  • Cite this

    Chao, H. J., & Uzun, N. (1992). A VLSI Sequencer chip for ATM traffic shaper and queue manager. In GLOBECOM 1992 - Communication for Global Users: IEEE Global Telecommunications Conference (pp. 1276-1281). [276598] (GLOBECOM 1992 - Communication for Global Users: IEEE Global Telecommunications Conference). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/GLOCOM.1992.276598