Abetting Planned Obsolescence by Aging 3D Networks-on-Chip

Sourav Das, Kanad Basu, Janardhan Rao Doppa, Partha Pratim Pande, Ramesh Karri, Krishnendu Chakrabarty

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

We set up a security analysis framework by aging the Network-on-Chip (NoC) to study planned obsolescence by the original equipment manufacturer (OEM). An NoC is the communication backbone in a manycore System-on-Chip (SoC). Planned obsolescence may adopt any vulnerability in the NoC to cause the SoC to fail. We show how an OEM can craft workloads to generate electromigration-induced stress and crosstalk noise in TSV-based vertical links in the NoC to hasten failure. We analyzed three malicious workloads and confirm that a crafted workload that injects 3-10% more traffic on to a few selected critical vertical links can shorten the lifetime of the NoC by 11%-25% averaged over the benchmarks considered in this work.

Original languageEnglish (US)
Title of host publication2018 12th IEEE/ACM International Symposium on Networks-on-Chip, NOCS 2018
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781538648933
DOIs
StatePublished - Oct 26 2018
Event12th IEEE/ACM International Symposium on Networks-on-Chip, NOCS 2018 - Torino, Italy
Duration: Oct 4 2018Oct 5 2018

Other

Other12th IEEE/ACM International Symposium on Networks-on-Chip, NOCS 2018
CountryItaly
CityTorino
Period10/4/1810/5/18

Fingerprint

Obsolescence
Aging of materials
Electromigration
Crosstalk
Telecommunication links
Network-on-chip
Communication

Keywords

  • 3D NoC
  • EDP
  • Electromigration
  • Energy
  • Hardware Attack
  • Latency
  • Security
  • TSV

ASJC Scopus subject areas

  • Computer Networks and Communications
  • Hardware and Architecture

Cite this

Das, S., Basu, K., Doppa, J. R., Pande, P. P., Karri, R., & Chakrabarty, K. (2018). Abetting Planned Obsolescence by Aging 3D Networks-on-Chip. In 2018 12th IEEE/ACM International Symposium on Networks-on-Chip, NOCS 2018 [8512162] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/NOCS.2018.8512162

Abetting Planned Obsolescence by Aging 3D Networks-on-Chip. / Das, Sourav; Basu, Kanad; Doppa, Janardhan Rao; Pande, Partha Pratim; Karri, Ramesh; Chakrabarty, Krishnendu.

2018 12th IEEE/ACM International Symposium on Networks-on-Chip, NOCS 2018. Institute of Electrical and Electronics Engineers Inc., 2018. 8512162.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Das, S, Basu, K, Doppa, JR, Pande, PP, Karri, R & Chakrabarty, K 2018, Abetting Planned Obsolescence by Aging 3D Networks-on-Chip. in 2018 12th IEEE/ACM International Symposium on Networks-on-Chip, NOCS 2018., 8512162, Institute of Electrical and Electronics Engineers Inc., 12th IEEE/ACM International Symposium on Networks-on-Chip, NOCS 2018, Torino, Italy, 10/4/18. https://doi.org/10.1109/NOCS.2018.8512162
Das S, Basu K, Doppa JR, Pande PP, Karri R, Chakrabarty K. Abetting Planned Obsolescence by Aging 3D Networks-on-Chip. In 2018 12th IEEE/ACM International Symposium on Networks-on-Chip, NOCS 2018. Institute of Electrical and Electronics Engineers Inc. 2018. 8512162 https://doi.org/10.1109/NOCS.2018.8512162
Das, Sourav ; Basu, Kanad ; Doppa, Janardhan Rao ; Pande, Partha Pratim ; Karri, Ramesh ; Chakrabarty, Krishnendu. / Abetting Planned Obsolescence by Aging 3D Networks-on-Chip. 2018 12th IEEE/ACM International Symposium on Networks-on-Chip, NOCS 2018. Institute of Electrical and Electronics Engineers Inc., 2018.
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