@inproceedings{12b35fa590f246cbaeebbbf50a8a2312,
title = "Adaptive and Energy-Efficient Architectures for Machine Learning: Challenges, Opportunities, and Research Roadmap",
abstract = "Gigantic rates of data production in the era of Big Data, Internet of Thing (IoT) / Internet of Everything (IoE), and Cyber Physical Systems (CSP) pose incessantly escalating demands for massive data processing, storage, and transmission while continuously interacting with the physical world under unpredictable, harsh, and energy-/power-constrained scenarios. Therefore, such systems need to support not only the high performance capabilities at tight power/energy envelop, but also need to be intelligent/cognitive, self-learning, and robust. As a result, a hype in the artificial intelligence research (e.g., deep learning and other machine learning techniques) has surfaced in numerous communities. This paper discusses the challenges and opportunities for building energy-efficient and adaptive architectures for machine learning. In particular, we focus on brain-inspired emerging computing paradigms, such as approximate computing; that can further reduce the energy requirements of the system. First, we guide through an approximate computing based methodology for development of energy-efficient accelerators, specifically for convolutional Deep Neural Networks (DNNs). We show that in-depth analysis of datapaths of a DNN allows better selection of Approximate Computing modules for energy-efficient accelerators. Further, we show that a multi-objective evolutionary algorithm can be used to develop an adaptive machine learning system in hardware. At the end, we summarize the challenges and the associated research roadmap that can aid in developing energy-efficient and adaptable hardware accelerators for machine learning.",
keywords = "accelerators, adaptive, approximate computing, architecture, CGRA, deep learning, energy efficiency, FPGA, low power, machine learning, memory, neural networks, performance, roadmap",
author = "Muhammad Shafique and Rehan Hafiz and Javed, {Muhammad Usama} and Sarmad Abbas and Lukas Sekanina and Zdenek Vasicek and Vojtech Mrazek",
note = "Publisher Copyright: {\textcopyright} 2017 IEEE. Copyright: Copyright 2018 Elsevier B.V., All rights reserved.; 2017 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2017 ; Conference date: 03-07-2017 Through 05-07-2017",
year = "2017",
month = jul,
day = "20",
doi = "10.1109/ISVLSI.2017.124",
language = "English (US)",
series = "Proceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI",
publisher = "IEEE Computer Society Press",
pages = "627--632",
editor = "Ricardo Reis and Mircea Stan and Michael Huebner and Nikolaos Voros",
booktitle = "Proceedings - 2017 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2017",
}