Aggressive test power reduction through test stimuli transformation

Ozgur Sinanoglu, Alex Orailoglu

Research output: Contribution to conferencePaperpeer-review

Abstract

Excessive switching activity during shift cycles in scan-based cores imposes considerable test power challenges. To ensure rapid and reliable test of SOCs, we propose a scan chain modification methodology that transforms the stimuli to be inserted to the scan chain through logic gate insertion between scan cells, reducing scan chain transitions. We introduce a novel matrix band algebra to formulate the impact of scan chain modifications on test stimuli transformations. Based on this analysis, we develop algorithms for transforming a set of test vectors into power-optimal test stimuli through cost effective scan chain modifications. Experimental results show that scan-in power reductions exceeding 90% for test vectors and 99.5% for test cubes can be attained by the proposed methodology.

Original languageEnglish (US)
Pages542-547
Number of pages6
StatePublished - 2003
EventProceedings: 21st International Conference on Computer Design ICCD 2003 - San Jose, CA, United States
Duration: Oct 13 2003Oct 15 2003

Other

OtherProceedings: 21st International Conference on Computer Design ICCD 2003
CountryUnited States
CitySan Jose, CA
Period10/13/0310/15/03

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering

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