ALPS: An algorithm for pipeline data path synthesis

Ramesh Karri, Alex Orailoglu

Research output: Chapter in Book/Report/Conference proceedingConference contribution


While techniques for design of high performance computing systems have been well understood, software mechanisms for the automatic design of high performance application specific integrated circuits (ASICS) remain relatively u nexplored. Advances in levels of integration will make it feasible to support performance-enhancing structures on a single chip. With the increasing demand for high performance in real-time signal processing applications, the design of high speed ASICS merits immediate attention. In this paper, we develop software mechanisms for the high-level synthesis of high-performance VLSI systems. We have extended our interactive behavioral synthesis framework that provides scheduling with multiple constraints including performance and cost, to support scheduling for high-performance. The system is powerful enough to allow trade-offs along mnltiple dimensions. The software mechanisms to support highperformance include a pipeline scheduler, ALPS, that supports constraints including performance and cost. ALPS is a polynomial time algorithm. Experimental results have shown that (a) ALPS consistently synthesizes designs on the optimal-designs curve, (b) it can be used for rapid prototypiug as well as for detailed synthesis, and (c) the interplay between performance and cost results in a rich set of design alternatives.

Original languageEnglish (US)
Title of host publicationMICRO 1991 - Proceedings of the 24th Annual International Symposium on Microarchitecture
PublisherIEEE Computer Society
Number of pages9
ISBN (Print)0897914600, 9780897914604
StatePublished - Sep 1 1991
Event24th Annual International Symposium on Microarchitecture, MICRO 1991 - Albuquerque, United States
Duration: Nov 18 1991Nov 20 1991

Publication series

NameProceedings of the Annual International Symposium on Microarchitecture, MICRO
ISSN (Print)1072-4451


Other24th Annual International Symposium on Microarchitecture, MICRO 1991
Country/TerritoryUnited States


  • Functional Pipelining
  • High-Level Synthesis

ASJC Scopus subject areas

  • Hardware and Architecture


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