TY - GEN
T1 - An approach to tolerate process related variations in memristor-based applications
AU - Rajendran, Jeyavijayan
AU - Maenm, Harika
AU - Karri, Ramesh
AU - Rose, Garrett S.
PY - 2011
Y1 - 2011
N2 - Memristors have been proposed to be used in a wide variety of applications ranging from neural networks to memory to digital logic. Like other electronic devices, memristors are also prone to process variations. We show that the effect of process induced variations in the thickness of the oxide layer of a memristor has a non-linear relationship with memristance. We analyze the effects of process variation on memristor-based threshold gates. We propose two algorithms to tolerate variations on memristance based on two different constraints. One is used to determine the memristance values for a given list of Boolean functions to tolerate a maximum amount of variation. The other is used to determine the list of Boolean functions that can tolerate a maximum amount of variation for given memristance values. Finally, we analyze the performance of memristor-based threshold gates to tolerate variations.
AB - Memristors have been proposed to be used in a wide variety of applications ranging from neural networks to memory to digital logic. Like other electronic devices, memristors are also prone to process variations. We show that the effect of process induced variations in the thickness of the oxide layer of a memristor has a non-linear relationship with memristance. We analyze the effects of process variation on memristor-based threshold gates. We propose two algorithms to tolerate variations on memristance based on two different constraints. One is used to determine the memristance values for a given list of Boolean functions to tolerate a maximum amount of variation. The other is used to determine the list of Boolean functions that can tolerate a maximum amount of variation for given memristance values. Finally, we analyze the performance of memristor-based threshold gates to tolerate variations.
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U2 - 10.1109/VLSID.2011.49
DO - 10.1109/VLSID.2011.49
M3 - Conference contribution
AN - SCOPUS:79952824977
SN - 9780769543482
T3 - Proceedings of the IEEE International Conference on VLSI Design
SP - 18
EP - 23
BT - Proceedings - 24th International Conference on VLSI Design, VLSI Design 2011, Held Jointly with 10th International Conference on Embedded Systems
T2 - 24th International Conference on VLSI Design, VLSI Design 2011, Held Jointly with 10th International Conference on Embedded Systems
Y2 - 2 January 2011 through 7 January 2011
ER -