This study was motivated by the desire to find a simple way to account for the effects of harmonics introduced by nonlinear loads. The use of nonlinear loads is increasing in residential, commercial and industrial applications. The harmonic content of currents supplying these nonlinear loads is quite high for many devices, such as computers, TV sets and other electronic equipment, which commonly use switched-mode ac-dc power supplies; low-wattage fluorescent lamps; uninterruptible power supplies (UPS); and adjustable-speed drives (ASD). These devices may easily draw currents whose total harmonic distortion (THD) exceeds 40 percent. The THD is defined as THD = √∑n=2∞In2/I 1 where I1 is the magnitude of the fundamental component, and the ln are the magnitudes of the harmonic components. For switched-mode. power supplies, the THD is about 100 percent. In turn, the current harmonics, flowing through the line and transformer impedances, also cause distortion of the voltages. Although the higher current harmonics may be small, the line and transformer reactances are proportional to frequency, so that voltage harmonics may become appreciable. Power system model: Figure 1 shows a one-line diagram of the power system selected for study. It is assumed that the three-phase load is balanced, and it is understood that the impedances aie in per-unit. The intention is to simulate the effects of harmonics, particularly on the customer supply voltage. A further assumption is made that, for most devices, small distortions in the shape of the input voltage do not affect the current waveshape significantly. This avoids the need for getting a detailed, exact representation of a device, such as a set of V-I characteristics, for every possible magnitude and shape of input voltage, and also greatly simplifies the simulation method. Device representation: Typical devices were tested with sinusoidal voltages, at 6 different levels, and their currents Fourier-analyzed to obtain the amplitudes and phases for each harmonic through the 30th. Thus, the current for each device was represented by 30 amplitude entries and 30 phase entries at each of the 6 voltage levels; i.e., by 360 data entries. Simulation scheme: The simulation procedure consists of the following steps: (1) with a given substation voltage (e.g. 13.8 kV) determine the voltages at the distribution buses, using only the fundamental of the load currents. These voltages can be obtained from the load-flow code; (2) For the load, look up the corresponding set of current bar-monics, and calculate the voltage drops across the impedances separately, for each frequency. The reactive part of the impedances must be re-calculated for each harmonic frequency. Once this has been done, the shapes of the load voltages can be plotted in the time domain, and the total harmonic distortion can be calculated. The line current and the load voltage waveforms were found to be in close agreement with results obtained experimentally. Error calculation: A set of very conservative assumptions was made to estimate the error. It was found that it did not exceed 8 percent, a Figure that is not objectionable in view of the uncertainties about the actual load distribution.
ASJC Scopus subject areas
- Electrical and Electronic Engineering