TY - GEN

T1 - An O(1) scheduling algorithm for variable-size packet switching systems

AU - Ye, Shunyuan

AU - Shen, Yanming

AU - Panwar, Shivendra

PY - 2010

Y1 - 2010

N2 - Internet traffic has increased at a very fast pace in recent years. The traffic demand requires that future packet switching systems should be able to switch packets in a very short time, i.e., just a few nanoseconds. Algorithms with lower computation complexity are more desirable for this high-speed switching design. Among the existing algorithms that can achieve 100% throughut for input-queued switches for any admissible Bernoulli traffic, ALGO3 [1] and EMHW [2] have the lowest computation complexity, which is O(logN), where N is the number of ports in the switch. In this paper, we propose a randomized scheduling algorithm, which can also stabilize the system for any admissible traffic that satisfies the strong law of large number. The algorithm has a complexity of O(1). Since the complexity does not increase with the size of a switch, the algorithm is highly scalable and a good choice for future high-speed switch designs. We also show that the algorithm can be implemented in a distributed way by using a low-rate control channel. Simulation results show that the algorithm can provide a good delay performance as compared to algorithms with higher computation complexity.

AB - Internet traffic has increased at a very fast pace in recent years. The traffic demand requires that future packet switching systems should be able to switch packets in a very short time, i.e., just a few nanoseconds. Algorithms with lower computation complexity are more desirable for this high-speed switching design. Among the existing algorithms that can achieve 100% throughut for input-queued switches for any admissible Bernoulli traffic, ALGO3 [1] and EMHW [2] have the lowest computation complexity, which is O(logN), where N is the number of ports in the switch. In this paper, we propose a randomized scheduling algorithm, which can also stabilize the system for any admissible traffic that satisfies the strong law of large number. The algorithm has a complexity of O(1). Since the complexity does not increase with the size of a switch, the algorithm is highly scalable and a good choice for future high-speed switch designs. We also show that the algorithm can be implemented in a distributed way by using a low-rate control channel. Simulation results show that the algorithm can provide a good delay performance as compared to algorithms with higher computation complexity.

UR - http://www.scopus.com/inward/record.url?scp=79952423338&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=79952423338&partnerID=8YFLogxK

U2 - 10.1109/ALLERTON.2010.5707119

DO - 10.1109/ALLERTON.2010.5707119

M3 - Conference contribution

AN - SCOPUS:79952423338

SN - 9781424482146

T3 - 2010 48th Annual Allerton Conference on Communication, Control, and Computing, Allerton 2010

SP - 1683

EP - 1690

BT - 2010 48th Annual Allerton Conference on Communication, Control, and Computing, Allerton 2010

T2 - 48th Annual Allerton Conference on Communication, Control, and Computing, Allerton 2010

Y2 - 29 September 2010 through 1 October 2010

ER -