TY - GEN
T1 - Anomaly Detection in Embedded Systems Using Power and Memory Side Channels
AU - Park, Jiho
AU - Surabhi, Virinchi Roy
AU - Krishnamurthy, Prashanth
AU - Garg, Siddharth
AU - Karri, Ramesh
AU - Khorrami, Farshad
N1 - Publisher Copyright:
© 2020 IEEE.
PY - 2020/5
Y1 - 2020/5
N2 - We propose multi-modal anomaly detection in embedded systems using time-correlated measurements of power consumption and memory accesses. Time series of power consumption of the processor and memory accesses between L2 cache and memory bus under known-good conditions are used to train one-class support vector machine (SVM) and isolation forest classifiers. These side channels have complementary anomaly detection capabilities. Experiments on a high-fidelity processor emulator show that the method accurately detects anomalies.
AB - We propose multi-modal anomaly detection in embedded systems using time-correlated measurements of power consumption and memory accesses. Time series of power consumption of the processor and memory accesses between L2 cache and memory bus under known-good conditions are used to train one-class support vector machine (SVM) and isolation forest classifiers. These side channels have complementary anomaly detection capabilities. Experiments on a high-fidelity processor emulator show that the method accurately detects anomalies.
KW - Anomaly detection
KW - cybersecurity
KW - memory access
KW - power consumption
KW - support vector machine (SVM)
UR - http://www.scopus.com/inward/record.url?scp=85089143587&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=85089143587&partnerID=8YFLogxK
U2 - 10.1109/ETS48528.2020.9131596
DO - 10.1109/ETS48528.2020.9131596
M3 - Conference contribution
AN - SCOPUS:85089143587
T3 - Proceedings of the European Test Workshop
BT - Proceedings - 2020 IEEE European Test Symposium, ETS 2020
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2020 IEEE European Test Symposium, ETS 2020
Y2 - 25 May 2020 through 29 May 2020
ER -