Application of carbon nanotubes in nano-lithography and nano-electronics

Y. Abdi, S. Mohajerzadeh, H. Hosseinzadegan, D. Shahrjerdi, M. Robertson, J. C. Bennett

Research output: Chapter in Book/Report/Conference proceedingConference contribution


We report a novel sub-micron, nano-lithography technique based on carbon nanotubes (CNTs). Vertically aligned CNTs are used to emit a collimated electron beam capable of generating patterns at the nano-scale regime. The encapsulation of CNTs in oxide and metal is the main feature of this approach and allows the formation of a sharp electron beam without the need of an external electrostatic or magnetic lens. The fabrication process starts with the deposition of a 5-10 nm thick Ni seed layer on (100) silicon substrates using e-beam evaporation and the Ni-coated substrates are placed in a DC-PECVD unit to grow the vertical CNTs. The growth requires a preconditioning step in which H2 with a flow rate of 30 seem is introduced into the reactor while the sample is held at 650°C. The plasma is then turned on for 5 mins and following this step, acetylene flows into the reactor with the plasma on. The growth occurs for 15 min using a mixture of H2 and C2H2 (6:1 flow ratio) at 650°C. Figure 1 depicts two SEM images of CNTs grown using different plasma intensities. Figure 2 is a typical TEM image of one of the CNTs showing a hollow tube inside a multi-wall structure. This image also displays the Ni seed placed on top of the tube indicating a tip-growth mechanism. The grown CNTs are then coated with a 0.2 μm TiO2 layer by means of a CVD reactor followed by a metal deposition step. Final fabrication of the devices requires one step of mechanical polishing to remove the oxide/metal bilayer from the top of the CNTs and one step of oxygen plasma ashing to remove the carbon from the top of the structure. The final structure consists of a CNT surrounded by an oxide/metal bilayer where the surface has been planarized. The ashing step leads to a recession of the CNT inside the surrounding bilayer making a partially hollow tube as pictoralized in Figure 3. The presence of the partially hollow surrounding oxide/metal bilayer resembles a nano-pipe and promotes the formation of an electron beam rather than spherically radiating electron emission from the tip. In Figure 4 we show schematically how this structure is employed to write patterns on a resist-coated substrate. The emission of electrons is controlled by a voltage applied between the anode and cathode where the top substrate, coated with resist material, is the anode and the bottom substrate is the cathode. Figure 5 displays the electrical characteristics of the device and precise control of the emitted current from CNTs onto the resist-coated substrate is evident. The outer surrounding metal acts as the gate of the device, and by applying a proper voltage between the gate and cathode, a large drop in the measured current on the top (anode) surface results. An on-off ratio of 104 was measured for this structure. The lithography technique presented in this paper is based on electron emission from encapsulated CNTs onto a resist-coated substrate. The patterns generated on the resist can then be used to produce patterns on another Ni-coated substrate which in turn can be used for further growth of CNTs. Figure 6 shows the evolution of an intentionally isolated CNT from an iterative sequence of growth/refinement steps. The first step involves deposition and patterning the first nickel-Si sample by standard optical lithography followed by the growth of CNTs in the PECVD reactor. Insets in Figure 6 show the lithography patterns. The growth at this stage is in the form of a small cluster of CNTs. By going through the fabrication process as stated previously, these clusters can be used to pattern nickel for a third substrate and to make smaller islands. We call this step "refinement" and its repetition three times leads to single isolated CNTs. Such isolated CNTs can be used to draw lines (or arcs) in a controlled manner using an X-Y positioning stage. Figures 7 and 8 display the results of lines drawn and we have been able to create lines with widths ranging from 22 to 40 nm using this inexpensive technique. In addition, the same lines have been used to pattern nickel for subsequent growth of CNTs, as shown in these figures. Applications of this approach to define the gate of MOSFET transistors and to make photonic crystals for the visible light regime are being pursued. Parallel to this work, we are developing a novel approach for lithography at the sub-ten nanometer scale as shown in Figure 9. The CNTs are grown on a thin membrane which is subsequently released using micro-machining of (100) silicon. Since the top side of the CNT (seen in Figure 2) has been blocked by nickel, a polishing step is necessary in order to remove the nickel. After encapsulation of the CNTs and removal of the membrane from the back side, the CNT is open at both ends. This CNT can then be used to generate a narrow beam of H2 ions from a laterally positioned plasma pixel inside the cavity of the micro-machined silicon. The hydrogen beam can bombard a negatively charged substrate and it is expected that patterns of the order of the inner diameter of the CNT, i.e. 5-8 nm, can be created. This work is currently underway.

Original languageEnglish (US)
Title of host publication63rd Device Research Conference Digest, DRC'05
Number of pages2
StatePublished - 2005
Event63rd Device Research Conference, DRC'05 - Santa Clara, CA, United States
Duration: Jun 20 2005Jun 22 2005

Publication series

NameDevice Research Conference - Conference Digest, DRC
ISSN (Print)1548-3770


Other63rd Device Research Conference, DRC'05
Country/TerritoryUnited States
CitySanta Clara, CA

ASJC Scopus subject areas

  • General Engineering


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