Applying temporal logic verification and synthesis to manufacturing systems

Marco Antoniotti, Mohsen Jafari, Bud Mishra

Research output: Contribution to journalConference article

Abstract

In this paper we describe an application of a prototype system that combines synthesis and verification techniques, capable of building discrete controller software for a variety of Robotics and Manufacturing Tasks. We developed and used the Control-D tool to specify the requirements of a real life example: a tray pack line built for the Combat Ration Advanced Manufacturing Technology Demonstration of Rutgers University.

Original languageEnglish (US)
Pages (from-to)4113-4118
Number of pages6
JournalProceedings of the IEEE International Conference on Systems, Man and Cybernetics
Volume5
StatePublished - 1995
EventProceedings of the 1995 IEEE International Conference on Systems, Man and Cybernetics. Part 2 (of 5) - Vancouver, BC, Can
Duration: Oct 22 1995Oct 25 1995

ASJC Scopus subject areas

  • Control and Systems Engineering
  • Hardware and Architecture

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