TY - GEN
T1 - Are hardware performance counters a cost effective way for integrity checking of programs
AU - Malone, Corey
AU - Zahran, Mohamed
AU - Karri, Ramesh
PY - 2011
Y1 - 2011
N2 - In this paper, we propose to use hardware performance counters (HPC) to detect malicious program modifications at load time (static) and at runtime (dynamic). HPC have been used for program characterization and testing, system testing and performance evaluation, and as side channels. We propose to use HPCs for static and dynamic integrity checking of programs.. The main advantage of HPC-based integrity checking is that it is almost free in terms of hardware cost; HPCs are built into almost all processors. The runtime performance overhead is minimal because we use the operating system for integrity checking, which is called anyway for process scheduling and other interrupts. Our preliminary results confirm that HPC very efficiently detect program modifications with very low cost.
AB - In this paper, we propose to use hardware performance counters (HPC) to detect malicious program modifications at load time (static) and at runtime (dynamic). HPC have been used for program characterization and testing, system testing and performance evaluation, and as side channels. We propose to use HPCs for static and dynamic integrity checking of programs.. The main advantage of HPC-based integrity checking is that it is almost free in terms of hardware cost; HPCs are built into almost all processors. The runtime performance overhead is minimal because we use the operating system for integrity checking, which is called anyway for process scheduling and other interrupts. Our preliminary results confirm that HPC very efficiently detect program modifications with very low cost.
KW - hardware performance counters
KW - integrity
UR - http://www.scopus.com/inward/record.url?scp=80755143408&partnerID=8YFLogxK
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U2 - 10.1145/2046582.2046596
DO - 10.1145/2046582.2046596
M3 - Conference contribution
AN - SCOPUS:80755143408
SN - 9781450310017
T3 - Proceedings of the ACM Conference on Computer and Communications Security
SP - 71
EP - 76
BT - STC'11 - Proceedings of the 6th ACM Workshop
T2 - 6th ACM Workshop on Scalable Trusted Computing, STC'11 - Co-located with 18th ACM Conference on Computer and Communications Security, CCS 2011
Y2 - 17 October 2011 through 17 October 2011
ER -