Atomic multireader register

Lefteris M. Kirousis, Evangelos Kranakis, Paul M.B. Vitányi

Research output: Chapter in Book/Report/Conference proceedingConference contribution


We give implementations for atomic, shared, asynchronous, wait-free registers: (i) A new implementation of an atomic, 1-writer, 1-reader, b-bit register from O (b) safe, boolean registers (i.e., from scratch). The solution uses neither repeated writing of the input nor repeated reading of the output. (ii) An implementation of an atomic, l-writer, n-reader, multibit register from O(n2) atomic, 1-writer, n-reader, multibit registers, Both constructions rely on the same idea. In a sense (ii) is a generalization of (i). These results show how to construct atomic, multireader registers from - basically - elementary hardware like flip-flops.

Original languageEnglish (US)
Title of host publicationDistributed Algorithms - 2nd International Workshop, Proceedings
EditorsJ. van Leeuwen
PublisherSpringer Verlag
Number of pages19
ISBN (Print)9783540193661
StatePublished - 1988
Event2nd International Workshop on Distributed Algorithms, WDAG 1987 - Amsterdam, Netherlands
Duration: Jul 8 1987Jul 10 1987

Publication series

NameLecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Volume312 LNCS
ISSN (Print)0302-9743
ISSN (Electronic)1611-3349


Conference2nd International Workshop on Distributed Algorithms, WDAG 1987


  • Atomic
  • Reader
  • Register
  • Regular
  • Shared register
  • Writer

ASJC Scopus subject areas

  • Theoretical Computer Science
  • General Computer Science


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