Automatic synthesis of self-recovering VLSI systems

In this paper, we will describe an integrated system for synthesizing self-recovering microarchitectures called SYNCERE. In the SYNCERE model for self-recovery, transient faults are detected using duplication and comparison, while recovery from transient faults is accomplished via checkpointing and rollback. SYNCERE initially inserts checkpoints subject to designer specified recovery time constraints. Subsequently, SYNCERE incorporates detection constraints by ensuring that two copies of the computation are executed on disjoint hardware. Towards ameliorating the dedicated hardware required for the original and duplicate computations, SYNCERE imposes intercopy hardware disjointness at a sub-computation level instead of at the overall computation level. The overhead is further moderated by restructuring the pliable input representation of the computation. SYNCERE has successfully derived numerous self-recovering microarchitectures. Towards validating the methodology for designing fault-tolerant VLSI ICs, we carried out a physical design of a self-recovering 16-point FIR filter.