Abstract
We introduce a new architecture for pipelined (and also algorithmic) A/D converters that give exponentially accurate conversion using inaccurate comparators. An error analysis of a sigma-delta converter with an imperfect comparator and a constant input reveals a self-correction property that is not inherited by the successive refinement quantization algorithm that underlies both pipelined multistage A/D converters as well as algorithmic A/D converters. Motivated by this example, we introduce a new A/D converter- the Beta Converter-which has the same self-correction property as a sigma-delta converter but which exhibits higher order (exponential) accuracy with respect to the bit rate as compared to a sigma-delta converter, which exhibits only polynomial accuracy.
Original language | English (US) |
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Title of host publication | Proceedings - IEEE International Symposium on Circuits and Systems |
Volume | 2 |
State | Published - 2002 |
Event | 2002 IEEE International Symposium on Circuits and Systems - Phoenix, AZ, United States Duration: May 26 2002 → May 29 2002 |
Other
Other | 2002 IEEE International Symposium on Circuits and Systems |
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Country/Territory | United States |
City | Phoenix, AZ |
Period | 5/26/02 → 5/29/02 |
ASJC Scopus subject areas
- Electrical and Electronic Engineering
- Electronic, Optical and Magnetic Materials