Byte-focal: A practical load balanced switch

Yanming Shen, Shi Jiang, Shivendra S. Panwar, H. Jonathan Chao

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Recently, a novel switch architecture, the load balanced (LB) switch proposed by C.S. Chang et al [1], [2] opened a new avenue for designing a large-capacity packet switch. The load balanced switch consists of two stages. First, a load-balancing stage spreads arriving packets equally among all linecards. Then, a forwarding stage transfers packets from the linecards to their final output destination. The load balanced switch does not need any centralized scheduler and can achieve 100% throughput under a broad class of traffic distributions. However, the load balanced switch may cause packets at the output port to be out of sequence. Several schemes have been proposed to tackle the out-of-sequence problem of the load balanced switch. However, they are either too complex to implement, or introduce a large additional delay. In this paper, we present a practical load balanced switch, called the Byte-Focal switch, which uses packet-by-packet scheduling to significantly improve the delay performance over switches of comparable complexity.

Original languageEnglish (US)
Title of host publication2005 Workshop on High Performance Switching and Routing, HPSR 2005
Pages6-12
Number of pages7
StatePublished - 2005
Event2005 Workshop on High Performance Switching and Routing, HPSR 2005 - Hong Kong, China
Duration: May 12 2005May 14 2005

Publication series

Name2005 Workshop on High Performance Switching and Routing, HPSR 2005

Other

Other2005 Workshop on High Performance Switching and Routing, HPSR 2005
CountryChina
CityHong Kong
Period5/12/055/14/05

ASJC Scopus subject areas

  • Engineering(all)

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