TY - JOUR
T1 - Characterization of accumulation layer capacitance for extracting data on high-k gate dielectrics
AU - Kar, Samares
AU - Rawat, Surendra
AU - Rakheja, Shaloo
AU - Reddy, Dharmendar
N1 - Funding Information:
Manuscript received November 23, 2004; revised March 14, 2005. This work was supported in part by the Department of Science and Technology, New Delhi, and in part by National Science Foundation, Washington, D.C. The review of this paper was arranged by Editor V. R. Rao. The authors are with the Department of Electrical Engineering, Indian Institute of Technology, Kanpur-208016, India (e-mail: [email protected]). Digital Object Identifier 10.1109/TED.2005.848867
PY - 2005/6
Y1 - 2005/6
N2 - A new parameter extraction technique has been outlined for high-k gate dielectrics that directly yields values of the dielectric capacitance Cdi, the accumulation layer surface potential quotient, βacc, the flat-band voltage, the surface potential s, the dielectric voltage, the channel doping density and the interface charge density at flat-band. The parallel capacitance, Cp(= Csc + Cit), was found to be an exponential function of φs in the strong accumulation regime, for seven different high-k gate dielectrics. The slope of the experimental InCp(φs) plot, i.e., Βacc , was found to depend strongly on the physical properties of the high-k dielectric, i.e., was inversely proportional to [(φbm*/m)1/2K/Cdi], where φb is the band offset, and m* is the effective tunneling mass. Extraction of Βacc represented an experimental carrier confinement index for the accumulation layer and an experimental gate-dielectric direct-tunneling current index. Βacc may also be an effective tool for monitoring the effects of post-deposition annealing/processing.
AB - A new parameter extraction technique has been outlined for high-k gate dielectrics that directly yields values of the dielectric capacitance Cdi, the accumulation layer surface potential quotient, βacc, the flat-band voltage, the surface potential s, the dielectric voltage, the channel doping density and the interface charge density at flat-band. The parallel capacitance, Cp(= Csc + Cit), was found to be an exponential function of φs in the strong accumulation regime, for seven different high-k gate dielectrics. The slope of the experimental InCp(φs) plot, i.e., Βacc , was found to depend strongly on the physical properties of the high-k dielectric, i.e., was inversely proportional to [(φbm*/m)1/2K/Cdi], where φb is the band offset, and m* is the effective tunneling mass. Extraction of Βacc represented an experimental carrier confinement index for the accumulation layer and an experimental gate-dielectric direct-tunneling current index. Βacc may also be an effective tool for monitoring the effects of post-deposition annealing/processing.
KW - Capacitance measurements
KW - Dielectric materials
KW - MOS capacitors
KW - MOSFETs
KW - Parameter estimation
KW - Quantization
KW - Semiconductor device measurements
KW - Semiconductor insulator interface
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U2 - 10.1109/TED.2005.848867
DO - 10.1109/TED.2005.848867
M3 - Article
AN - SCOPUS:21044441684
SN - 0018-9383
VL - 52
SP - 1187
EP - 1193
JO - IEEE Transactions on Electron Devices
JF - IEEE Transactions on Electron Devices
IS - 6
ER -