Characterization of accumulation layer capacitance for extracting data on high-k gate dielectrics

Samares Kar, Surendra Rawat, Shaloo Rakheja, Dharmendar Reddy

Research output: Contribution to journalArticlepeer-review


A new parameter extraction technique has been outlined for high-k gate dielectrics that directly yields values of the dielectric capacitance Cdi, the accumulation layer surface potential quotient, βacc, the flat-band voltage, the surface potential s, the dielectric voltage, the channel doping density and the interface charge density at flat-band. The parallel capacitance, Cp(= Csc + Cit), was found to be an exponential function of φs in the strong accumulation regime, for seven different high-k gate dielectrics. The slope of the experimental InCps) plot, i.e., Βacc , was found to depend strongly on the physical properties of the high-k dielectric, i.e., was inversely proportional to [(φbm*/m)1/2K/Cdi], where φb is the band offset, and m* is the effective tunneling mass. Extraction of Βacc represented an experimental carrier confinement index for the accumulation layer and an experimental gate-dielectric direct-tunneling current index. Βacc may also be an effective tool for monitoring the effects of post-deposition annealing/processing.

Original languageEnglish (US)
Pages (from-to)1187-1193
Number of pages7
JournalIEEE Transactions on Electron Devices
Issue number6
StatePublished - Jun 2005


  • Capacitance measurements
  • Dielectric materials
  • MOS capacitors
  • Parameter estimation
  • Quantization
  • Semiconductor device measurements
  • Semiconductor insulator interface

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering


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