Chip level thermal profile estimation using On-chip temperature sensors

Yufu Zhang, Ankur Srivastava, Mohamed Zahran

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

This paper addresses the problem of chip level thermal profile estimation using runtime temperature sensor readings. We address the challenges of a) availability of only a few thermal sensors with constrained locations (sensors cannot be placed just anywhere) b) random on-chip power density characteristics due to unpredictable workloads and fabrication variability. Firstly we model the random power density as a probability density function. Given this random characteristic and runtime thermal sensor readings, we exploit the correlation between power dissipation of different chip modules to estimate the expected value of temperature at each chip location. Our methods are optimal if the underlying power density has Gaussian nature. We also present a heuristic to generate the chip level thermal profile estimates when the underlying randomness is non-Gaussian. Experimental results indicate that our method generates highly accurate thermal profile estimates of the entire chip at runtime using only a few thermal sensors.

Original languageEnglish (US)
Title of host publication26th IEEE International Conference on Computer Design 2008, ICCD
Pages432-437
Number of pages6
DOIs
StatePublished - 2008
Event26th IEEE International Conference on Computer Design 2008, ICCD - Lake Tahoe, CA, United States
Duration: Oct 12 2008Oct 15 2008

Publication series

Name26th IEEE International Conference on Computer Design 2008, ICCD

Conference

Conference26th IEEE International Conference on Computer Design 2008, ICCD
CountryUnited States
CityLake Tahoe, CA
Period10/12/0810/15/08

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering

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