Clotho: Proactive wearout deceleration in Chip-Multiprocessor interconnects

Arseniy Vitkovskiy, Vassos Soteriou, Paul V. Gratz

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

With advancing process technology, Chip-Multiprocessors (CMPs) are experiencing ever worsening reliability due to prolonged operational stresses. The network-on-chip that interconnects the components of CMPs is especially vulnerable to such wearout-induced failure. To tackle this ominous threat we present Clotho, a novel, wearout-Aware routing algorithm. Clotho continuously considers the stresses the on-chip interconnect experiences at runtime, along with temperature and fabrication process variation metrics, steering traffic away from locations that are most prone to Electromigration (EM)-and Hot-Carrier Injection (HCI)-induced wear. Under realistic workloads Clotho yields 66% and 8% average increases in mean time to failure for EM and HCI, respectively.

Original languageEnglish (US)
Title of host publicationProceedings of the 33rd IEEE International Conference on Computer Design, ICCD 2015
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages117-124
Number of pages8
ISBN (Electronic)9781467371650
DOIs
StatePublished - Dec 14 2015
Event33rd IEEE International Conference on Computer Design, ICCD 2015 - New York City, United States
Duration: Oct 18 2015Oct 21 2015

Publication series

NameProceedings of the 33rd IEEE International Conference on Computer Design, ICCD 2015

Other

Other33rd IEEE International Conference on Computer Design, ICCD 2015
Country/TerritoryUnited States
CityNew York City
Period10/18/1510/21/15

ASJC Scopus subject areas

  • Computer Graphics and Computer-Aided Design
  • Computer Science Applications

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