Compiling path expressions into VLSI circuits

T. S. Anantharaman, E. M. Clarke, M. J. Foster, B. Mishra

Research output: Chapter in Book/Report/Conference proceedingChapter

Abstract

Path expressions were originally proposed as a mechanism for process synchronization at the monitor level in software. They also provide a useful notation for specifying the behavior of asynchronous circuits. Motivated by these potential applications we investigate how to directly translate path expressions into hardware. Our implementation is complicated in the case of multiple path expressions by the need for synchronization on event names that are common to more than one path. Moreover, since events are inherently asynchronous in our model, all of our circuits must be self-timed. Nevertheless, the circuits produced by our construction have area proportional to N multiplied by (times) log(N) where N is the total length of the multiple path expression under consideration. This bound holds regardless of the number of individual paths or the degree of synchronization between paths.

Original languageEnglish (US)
Title of host publicationUnknown Host Publication Title
Pages305-355
Number of pages51
StatePublished - 1987

ASJC Scopus subject areas

  • Engineering(all)

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