Computer-aided design of fault-tolerant VLSI systems

Ramesh Karri, Karin Hogstedt, Alex Orailoglu

Research output: Contribution to journalArticlepeer-review


The authors present a flexible methodology for compiling an algorithmic description into an equivalent fault-tolerant VLSI circuit and a CAD framework embodying this methodology. Experimental designs illustrate and validate algorithms for automated synthesis of ICs featuring either self-recovery capability or enhanced reliability.

Original languageEnglish (US)
Pages (from-to)88-96
Number of pages9
JournalIEEE Design and Test of Computers
Issue number3
StatePublished - Sep 1996

ASJC Scopus subject areas

  • Software
  • Hardware and Architecture
  • Electrical and Electronic Engineering


Dive into the research topics of 'Computer-aided design of fault-tolerant VLSI systems'. Together they form a unique fingerprint.

Cite this