Abstract
In this work, we advance the security promise of split manufacturing through judicious handling of interconnects. First, we study the cost-security tradeoffs underlying for split manufacturing, which are limiting its adoption. Next, aiming to resolve these concerns, we propose three effective and efficient strategies to dedicatedly lift nets to higher metal layers. Toward this end, we design custom 'elevating cells' and devise procedures for routing blockages. All our techniques are employed in a commercial-grade computer-Aided design (CAD) framework. For our security analysis, we leverage various state-of-The-Art attacks (network flow-based attack, routing-congestion-Aware attack, and deep learning-based attack), established metrics (correct connection rate, output error rate, and Hamming distance), and advanced metrics (percentage of netlist recovery and mutual information). Our extensive experiments show that our scheme provides superior protection. Simultaneously, we induce reasonably low and controllable overheads on power and performance, without any silicon area costs. Besides, we support higher split layers, which helps to alleviate concerns on the practicality of split manufacturing.
Original language | English (US) |
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Pages (from-to) | 266-280 |
Number of pages | 15 |
Journal | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems |
Volume | 41 |
Issue number | 2 |
DOIs | |
State | Published - Feb 1 2022 |
Keywords
- Hardware security
- intellectual property (IP) protection
- reverse engineering
- routing perturbation
- split manufacturing
ASJC Scopus subject areas
- Software
- Computer Graphics and Computer-Aided Design
- Electrical and Electronic Engineering