CYSEP - A cyber-security processor for 10GBPS networks and beyond

H. Jonathan Chao; Ramesh Karri; Wing Cheong Lau

CYSEP - A cyber-security processor for 10GBPS networks and beyond

H. Jonathan Chao, Ramesh Karri, Wing Cheong Lau

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

In this paper, we describe the architecture of a Cyber-Security Processor (CYSEP) which can serve as a key module for enhancing security for high-speed networks/systems. The CYSEP supports, at wire-speed, four major functions, namely, firewall/ intrusion detection, encryption/decryption, message authentication, and distributed denial of service (DDoS) attack protection. The CYSEP is to be implemented on an application-specific integrated circuit (ASIC) with the state-of-art CMOS 0.18-mircron technology and expected to operate at 10 Gbps or higher. Massive parallelism and pipelining technique are to be employed in the ASIC to achieve the 10 Gbps wire-speed operation.

Original language	English (US)
Title of host publication	MILCOM 2004 - 2004 IEEE Military Communications Conference
Pages	1114-1122
Number of pages	9
Volume	2
State	Published - 2004
Event	MILCOM 2004 - 2004 IEEE Military Communications Conference - Monterey, CA, United States Duration: Oct 31 2004 → Nov 3 2004

Other

Other	MILCOM 2004 - 2004 IEEE Military Communications Conference
Country/Territory	United States
City	Monterey, CA
Period	10/31/04 → 11/3/04

ASJC Scopus subject areas

Civil and Structural Engineering
Electrical and Electronic Engineering

Cite this

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title = "CYSEP - A cyber-security processor for 10GBPS networks and beyond",

abstract = "In this paper, we describe the architecture of a Cyber-Security Processor (CYSEP) which can serve as a key module for enhancing security for high-speed networks/systems. The CYSEP supports, at wire-speed, four major functions, namely, firewall/ intrusion detection, encryption/decryption, message authentication, and distributed denial of service (DDoS) attack protection. The CYSEP is to be implemented on an application-specific integrated circuit (ASIC) with the state-of-art CMOS 0.18-mircron technology and expected to operate at 10 Gbps or higher. Massive parallelism and pipelining technique are to be employed in the ASIC to achieve the 10 Gbps wire-speed operation.",

author = "Chao, {H. Jonathan} and Ramesh Karri and Lau, {Wing Cheong}",

year = "2004",

language = "English (US)",

volume = "2",

pages = "1114--1122",

booktitle = "MILCOM 2004 - 2004 IEEE Military Communications Conference",

note = "MILCOM 2004 - 2004 IEEE Military Communications Conference ; Conference date: 31-10-2004 Through 03-11-2004",

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T1 - CYSEP - A cyber-security processor for 10GBPS networks and beyond

AU - Chao, H. Jonathan

AU - Karri, Ramesh

AU - Lau, Wing Cheong

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N2 - In this paper, we describe the architecture of a Cyber-Security Processor (CYSEP) which can serve as a key module for enhancing security for high-speed networks/systems. The CYSEP supports, at wire-speed, four major functions, namely, firewall/ intrusion detection, encryption/decryption, message authentication, and distributed denial of service (DDoS) attack protection. The CYSEP is to be implemented on an application-specific integrated circuit (ASIC) with the state-of-art CMOS 0.18-mircron technology and expected to operate at 10 Gbps or higher. Massive parallelism and pipelining technique are to be employed in the ASIC to achieve the 10 Gbps wire-speed operation.

AB - In this paper, we describe the architecture of a Cyber-Security Processor (CYSEP) which can serve as a key module for enhancing security for high-speed networks/systems. The CYSEP supports, at wire-speed, four major functions, namely, firewall/ intrusion detection, encryption/decryption, message authentication, and distributed denial of service (DDoS) attack protection. The CYSEP is to be implemented on an application-specific integrated circuit (ASIC) with the state-of-art CMOS 0.18-mircron technology and expected to operate at 10 Gbps or higher. Massive parallelism and pipelining technique are to be employed in the ASIC to achieve the 10 Gbps wire-speed operation.

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M3 - Conference contribution

AN - SCOPUS:27744489607

VL - 2

SP - 1114

EP - 1122

BT - MILCOM 2004 - 2004 IEEE Military Communications Conference

T2 - MILCOM 2004 - 2004 IEEE Military Communications Conference

Y2 - 31 October 2004 through 3 November 2004

ER -

CYSEP - A cyber-security processor for 10GBPS networks and beyond

Abstract

Other

ASJC Scopus subject areas

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