D0 calorimeter electronics for the upgraded Tevatron Collider

The upgrade of the Fermilab Tevatron Collider will reduce the present 3.5 microsecond bunch spacing (the time between bunch crossings) to 396 ns and ultimately to 132 ns. The shorter bunch spacing imposes tighter timing requirement on both the signals from the calorimeter and the timing for signal sampling. This change requires the replacement of the D0 detector calorimeter front-end electronics. The 2+ μs first level (L1) trigger decision time requires to hold the events in the meantime. A high resolution analog memory element (Switched Capacitor Array - SCA) has been developed for this purpose and used in a complex analog memory system (L1 buffers) to minimize the dead time at the front end input. The second level (L2) trigger system has a decision time of 20 - 100 μs. To minimize the dead time further required an additional analog buffer to free up the L1 buffers before the L2 decision is completed and to hold the accepted events until they can be transferred to the third level (L3) trigger. A flexible Timing And Calibration control (TAC) system is under development for buffer management, sampling synchronization, trigger event read out and calibration control. The TAC system is also responsible for the data flow control from the front end to the (L3) trigger.