TY - GEN
T1 - Dark silicon as a challenge for hardware/software co-design
AU - Shafique, Muhammad
AU - Garg, Siddharth
AU - Mitra, Tulika
AU - Parameswaran, Sri
AU - Henkel, Jörg
PY - 2014/10/12
Y1 - 2014/10/12
N2 - Dark Silicon refers to the observation that in future technology nodes, it may only be possible to power-on a fraction of on-chip resources (processing cores, hardware accelerators, cache blocks and so on) in order to stay within the power budget and safe thermal limits, while the other resources will have to be kept powered-off or "dark". In other words, chips will have an abundance of transistors, i.e., more than the number that can be simultaneously powered-on. Heterogeneous computing has been proposed as one way to effectively leverage this abundance of transistors in order to increase performance, energy efficiency and even reliability within power and thermal constraints. However, several critical challenges remain to be addressed including design, automated synthesis, design space exploration and run-time management of heterogeneous dark silicon processors. The hardware/software co-design and synthesis community has potentially much to contribute in solving these new challenges introduced by dark silicon and, in particular, heterogeneous computing. In this paper, we identify and highlight some of these critical challenges, and outline some of our early research efforts in addressing them.
AB - Dark Silicon refers to the observation that in future technology nodes, it may only be possible to power-on a fraction of on-chip resources (processing cores, hardware accelerators, cache blocks and so on) in order to stay within the power budget and safe thermal limits, while the other resources will have to be kept powered-off or "dark". In other words, chips will have an abundance of transistors, i.e., more than the number that can be simultaneously powered-on. Heterogeneous computing has been proposed as one way to effectively leverage this abundance of transistors in order to increase performance, energy efficiency and even reliability within power and thermal constraints. However, several critical challenges remain to be addressed including design, automated synthesis, design space exploration and run-time management of heterogeneous dark silicon processors. The hardware/software co-design and synthesis community has potentially much to contribute in solving these new challenges introduced by dark silicon and, in particular, heterogeneous computing. In this paper, we identify and highlight some of these critical challenges, and outline some of our early research efforts in addressing them.
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U2 - 10.1145/2656075.2661645
DO - 10.1145/2656075.2661645
M3 - Conference contribution
AN - SCOPUS:84910621594
T3 - 2014 International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2014
BT - 2014 International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2014
PB - Association for Computing Machinery
T2 - 2014 International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2014
Y2 - 12 October 2014 through 17 October 2014
ER -