Darknoc: Designing energyefficient networkonchip with multivt cells for dark silicon

Haseeb Bokhari, Haris Javaid, Muhammad Shafique, Jörg Henkel, Sri Parameswaran

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

In this paper, we propose a novel NoC architecture, called dark-NoC, where multiple layers of architecturally identical, but physically different routers are integrated, leveraging the extra transistors available due to dark silicon . Each layer is separately optimized for a particular voltage-frequency range by the adroit use of multi-Vt circuit optimization. At a given time, only one of the network layers is illuminated while all the other network layers are dark. We provide architectural support for seamless integration of multiple network layers, and a fast inter-layer switching mechanism without dropping in-network packets. Our experiments on a 4 × 4 mesh with multi-programmed real application workloads show that darkNoC improves energy-delay product by up to 56% compared to a traditional single layer NoC with state-of-the-art DVFS. This illustrates darkNoC can be used as an energy-efficient communication fabric in future dark silicon chips.

Original languageEnglish (US)
Title of host publicationDAC 2014 - 51st Design Automation Conference, Conference Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Print)9781479930173
DOIs
StatePublished - 2014
Event51st Annual Design Automation Conference, DAC 2014 - San Francisco, CA, United States
Duration: Jun 2 2014Jun 5 2014

Publication series

NameProceedings - Design Automation Conference
ISSN (Print)0738-100X

Other

Other51st Annual Design Automation Conference, DAC 2014
CountryUnited States
CitySan Francisco, CA
Period6/2/146/5/14

ASJC Scopus subject areas

  • Computer Science Applications
  • Control and Systems Engineering
  • Electrical and Electronic Engineering
  • Modeling and Simulation

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