Abstract
Combined input-output buffering with a moderate speedup for internal switch fabric has been considered as the most feasible solution to build large-capacity packet switches. This paper describes several schemes to further scale up our previously proposed Abacus switch [IEEE J. Select. Areas Commun. 15 (1997) 830] to multiple terabit per second. The Abacus switch implements the arbiter in a distributed manner, allowing the switch to be scaled in both the port speed and the switch capacity. The switch can be easily implemented using crosspoint switch chips with self-routing capability. The enhanced version can also route variable-length packets without doing packet reassembly at the output.
Original language | English (US) |
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Pages (from-to) | 577-589 |
Number of pages | 13 |
Journal | Computer Communications |
Volume | 25 |
Issue number | 6 |
DOIs | |
State | Published - Apr 1 2002 |
Keywords
- Arbitration
- Input buffered switch
- Switch architecture
- Terabit switching
ASJC Scopus subject areas
- Computer Networks and Communications