Design and challenges in a 100 Gb/s hybrid-integrated photonic circuit

P. Bernasconi, M. P. Earnshaw, H. Debregeas, M. Achouche, J. Sinsky, D. T. Neilson, Y. Low, R. Farah, D. Ramsey, M. Rasras, N. Basavanhally, F. Pardo, F. Brillouet

Research output: Contribution to conferencePaper

Abstract

Hybrid-integrated, 10×10.7-Gbps WDM transmitters and receivers are built upon DML arrays and APD arrays combined with electronic dispersion compensation. 80-km unamplified transmission is demonstrated with devices 32.5 cm2 in size and power dissipation under 17 W.

Original languageEnglish (US)
DOIs
StatePublished - 2012
EventEuropean Conference and Exhibition on Optical Communication, ECEOC 2012 - Amsterdam, Netherlands
Duration: Sep 16 2012Sep 20 2012

Other

OtherEuropean Conference and Exhibition on Optical Communication, ECEOC 2012
CountryNetherlands
CityAmsterdam
Period9/16/129/20/12

ASJC Scopus subject areas

  • Computer Networks and Communications

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  • Cite this

    Bernasconi, P., Earnshaw, M. P., Debregeas, H., Achouche, M., Sinsky, J., Neilson, D. T., Low, Y., Farah, R., Ramsey, D., Rasras, M., Basavanhally, N., Pardo, F., & Brillouet, F. (2012). Design and challenges in a 100 Gb/s hybrid-integrated photonic circuit. Paper presented at European Conference and Exhibition on Optical Communication, ECEOC 2012, Amsterdam, Netherlands. https://doi.org/10.1364/ECEOC.2012.Tu.4.E.3