Design automation for hybrid CMOS-nanoelectronics crossbars

Kyosun Kim; Ramesh Karri; Alex Orailoglu

doi:10.1109/NANOARCH.2007.4400854

Design automation for hybrid CMOS-nanoelectronics crossbars

Kyosun Kim, Ramesh Karri, Alex Orailoglu

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

We developed the first automatic design system targeting a promising hybrid CMOS-Nanoelectronics Architecture called CMOL [5]. The CMOL architecture uses NOR gates to implement combinational logic. In this hybrid CMOS-nanoelectronics architecture, logical functions and the interconnections share the nanoelectronics hardware resource. Towards automating the CMOL physical design process, we developed a model for the CMOL architecture, formulated the placement and routing problems for the CMOL architecture subject to the unique CMOL specific constraints, and solved it by combining a placement algorithm with a gate assignment algorithm in a loop. We validated the proposed approach by implementing several industrial strength designs.

Original language	English (US)
Title of host publication	2007 IEEE International Symposium on Nanoscale Architectures, NANOARCH
Publisher	IEEE Computer Society
Pages	27-32
Number of pages	6
ISBN (Print)	9781424417919
DOIs	https://doi.org/10.1109/NANOARCH.2007.4400854
State	Published - 2007
Event	2007 IEEE International Symposium on Nanoscale Architectures, NANOARCH - San Jose, CA, United States Duration: Oct 21 2007 → Oct 22 2007

Publication series

Name	2007 IEEE International Symposium on Nanoscale Architectures, NANOARCH

Other

Other	2007 IEEE International Symposium on Nanoscale Architectures, NANOARCH
Country/Territory	United States
City	San Jose, CA
Period	10/21/07 → 10/22/07

Keywords

Automatic Layout Design
MOL FPGA

ASJC Scopus subject areas

Hardware and Architecture
Electrical and Electronic Engineering

Access to Document

10.1109/NANOARCH.2007.4400854

Cite this

Design automation for hybrid CMOS-nanoelectronics crossbars. / Kim, Kyosun; Karri, Ramesh; Orailoglu, Alex.
2007 IEEE International Symposium on Nanoscale Architectures, NANOARCH. IEEE Computer Society, 2007. p. 27-32 4400854 (2007 IEEE International Symposium on Nanoscale Architectures, NANOARCH).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Kim, K, Karri, R & Orailoglu, A 2007, Design automation for hybrid CMOS-nanoelectronics crossbars. in 2007 IEEE International Symposium on Nanoscale Architectures, NANOARCH., 4400854, 2007 IEEE International Symposium on Nanoscale Architectures, NANOARCH, IEEE Computer Society, pp. 27-32, 2007 IEEE International Symposium on Nanoscale Architectures, NANOARCH, San Jose, CA, United States, 10/21/07. https://doi.org/10.1109/NANOARCH.2007.4400854

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title = "Design automation for hybrid CMOS-nanoelectronics crossbars",

abstract = "We developed the first automatic design system targeting a promising hybrid CMOS-Nanoelectronics Architecture called CMOL [5]. The CMOL architecture uses NOR gates to implement combinational logic. In this hybrid CMOS-nanoelectronics architecture, logical functions and the interconnections share the nanoelectronics hardware resource. Towards automating the CMOL physical design process, we developed a model for the CMOL architecture, formulated the placement and routing problems for the CMOL architecture subject to the unique CMOL specific constraints, and solved it by combining a placement algorithm with a gate assignment algorithm in a loop. We validated the proposed approach by implementing several industrial strength designs.",

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AB - We developed the first automatic design system targeting a promising hybrid CMOS-Nanoelectronics Architecture called CMOL [5]. The CMOL architecture uses NOR gates to implement combinational logic. In this hybrid CMOS-nanoelectronics architecture, logical functions and the interconnections share the nanoelectronics hardware resource. Towards automating the CMOL physical design process, we developed a model for the CMOL architecture, formulated the placement and routing problems for the CMOL architecture subject to the unique CMOL specific constraints, and solved it by combining a placement algorithm with a gate assignment algorithm in a loop. We validated the proposed approach by implementing several industrial strength designs.

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ER -

Design automation for hybrid CMOS-nanoelectronics crossbars

Abstract

Publication series

Other

Keywords

ASJC Scopus subject areas

Access to Document

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